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參數(shù)資料
| 型號(hào)： | DS1004Z-5 |
| 元件分類： | 延遲線 |
| 英文描述： | PT 18C 18#20 SKT PLUG |
| 中文描述： | 5抽頭高速硅延遲線 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 54K |
| 代理商： | DS1004Z-5 |
1 of 6
111799
FEATURES
All-silicon timing circuit
Five equally delayed clock phases per input
Precise tap-to-tap delay tolerances of ±0.5,
±0.75, or ±1 ns
Input-to-tap 1 delay of 5 ns
Delay tolerances of ±1.5 ns over temperature
and voltage
Leading and trailing edge precision preserves
the input symmetry
CMOS design with TTL compatibility
Standard 8-pin DIP and 150 mil 8-pin SOIC
Vapor phase, IR and wave solderable
Available in Tape and Reel
PIN ASSIGNMENT
PIN DESCRIPTION
TAP 1-5
V
CC
GND
IN
- TAP Output Number
- +5 Volt Supply
- Ground
- Input
DESCRIPTION
The DS1004 is a 5-tap all silicon delay line which can provide 2, 3, 4, or 5 ns tap-to-tap delays within a
standard part family. The device is Dallas Semiconductor’s fastest 5-tap delay line. It is available in a
standard 8-pin DIP and 150 mil 8-pin mini-SOIC. The device features precise leading and trailing edge
accuracies and has the inherent reliability of an all-silicon delay line solution.
The DS1004 is specified for tap-to-tap tolerances as shown in Table 1. Each device has a minimum input-
to-tap 1 delay of 5 ns. Subsequent taps (taps 2 through 5) are precisely delayed by 2, 3, 4, or 5 ns. See
Table 1 for details. Tolerance over temperature and voltage is
±
1.5 ns. Nominal tap-to-tap tolerances
range from
±
0.5 ns to
±
1.0 ns. Each output is capable of driving up to 10 LS loads.
For customers needing non-standard delay values, the Late Package Program (LPP) is available.
Customers may contact Dallas Semiconductor at (972) 371–4348 for further details.
DS1004
5-Tap High Speed
Silicon Delay Line
www.dalsemi.com
IN
TAP 2
TAP 4
GND
V
CC
TAP 1
TAP 3
TAP 5
1
2
3
4
6
5
8
7
DS1004M 8-Pin DIP (300-mil)
See Mech. Drawings Section
IN
TAP 2
TAP 4
GND
V
CC
TAP 1
TAP 3
TAP 5
1
2
3
4
6
5
8
7
DS1004Z 8-Pin SOIC (150-mil)
See Mech. Drawings Section
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1004 | RECTIFIER BRIDGE 1A 600V DB-1 |
| DS1004M-2 | RECTIFIER BRIDGE 1A 800V DB-1 |
| DS1004M-3 | 5-Tap High Speed Silicon Delay Line |
| DS1004M-4 | RECTIFIER PASSIVATED 1A 50V SMD MELF |
| DS1004M-5 | 5-Tap High Speed Silicon Delay Line |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1004Z-5/T&R | 制造商:Maxim Integrated Products 功能描述:IC DELAY LINE 5TAP 25NS 8SOIC |
| DS1004Z-5/T&R | 功能描述:延遲線/計(jì)時(shí)元素 5-Tap High-Speed Delay Line RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1004Z-5/T&R/601 | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1004Z-5/W | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1004Z-5+ | 功能描述:延遲線/計(jì)時(shí)元素 5-Tap High-Speed Delay Line RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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