- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨�(m菐i)璩�(m脿i)IC缍�(w菐ng) > PDF鐩寗1992 > DS1004Z-5+T (Maxim Integrated Products)IC DELAY LINE 5TAP 25NS 8-SOIC PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | DS1004Z-5+T |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 5/6闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC DELAY LINE 5TAP 25NS 8-SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 妯�(bi膩o)鐗�/姝ョ礆(j铆)鏁�(sh霉)锛� | 5 |
| 鍔熻兘锛� | 涓嶅彲绶ㄧ▼ |
| 寤堕伈鍒扮涓€鎶介牠锛� | 5ns |
| 鎺ラ牠澧為噺锛� | 5ns |
| 鍙敤鐨勭附寤堕伈锛� | 25ns |
| 鐛�(d煤)绔嬪欢閬叉暩(sh霉)锛� | 1 |
| 闆绘簮闆诲锛� | 4.75 V ~ 5.25 V |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤�(l猫i)鍨嬶細 | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 甯跺嵎 (TR) |
DS1004
5 of 6
NOTES:
1. All voltages are referenced to ground.
2. VCC=5V and 25
掳C. Delay accuracy on both the rising and falling edges within tolerances given in
Table 1.
3. Pulse width and duty cycle specifications may be exceeded, however, accuracy will be application
sensitive with respect to decoupling, layout, etc.
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
掳C 卤=3掳C
Supply Voltage (VCC):
5.0V
卤=0.1V
Input Pulse:
High = 3.0V
卤=0.1V
Low = 0.0V
卤=0.1V
Source Impedance:
50 ohm max.
Rise and Fall Time:
3.0 ns max. (measured between 0.6V and 2.4V)
Pulse Width:
500 ns
Pulse Period:
1
s
Output Load
Capacitance:
15 pF
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Data is measured at the 1.5V level on
the rising and falling edge.
NOTE:
Above conditions are for test only and do not restrict the devices under other data sheet conditions.
TIMING DIAGRAM: DS1004 INPUT TO OUTPUTS
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| DS1005-125+ | IC DELAY LINE 5TAP 125NS 14-DIP |
| DS1007S-2+T&R | IC DELAY LINE 4NS 16-SOIC |
| DS1010S-50+T&R | IC DELAY LINE 10TAP 16-SOIC |
| DS1013S-25+T&R | IC DELAY LINE 25NS 16-SOIC |
| DS1020S-50+T | IC DELAY LINE 256TAP 16-SOIC |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DS1005 | 鍒堕€犲晢:DALLAS 鍒堕€犲晢鍏ㄧū(ch膿ng):Dallas Semiconductor 鍔熻兘鎻忚堪:5-Tap Silicon Delay Line |
| DS1005-100 | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
| DS1005-125 | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
| DS1005-125+ | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
| DS1005-150 | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
鐧�(f膩)甯冪穵鎬ラ噰璩�(g貌u)锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
