參數(shù)資料
型號(hào): DS1004Z-4/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 6/6頁
文件大小: 0K
描述: IC DELAY LINE 5TAP 21NS 8-SOIC
標(biāo)準(zhǔn)包裝: 2,500
標(biāo)片/步級(jí)數(shù): 5
功能: 不可編程
延遲到第一抽頭: 5ns
接頭增量: 4ns
可用的總延遲: 21ns
獨(dú)立延遲數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
DS1004
6 of 6
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
tWI (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
1.5V point on the trailing edge or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
input pulse.
tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
input pulse.
tPLH (Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
pulse and the 1.5V point on the leading edge of the output pulse.
tPHL (Time Delay, Falling): The elapsed time between the 1.5V point on the falling edge of the input
pulse and the 1.5V point on the falling edge of the output pulse.
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