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參數(shù)資料
| 型號： | DS1004M-5 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Delay Line |
| 英文描述： | SILICON DELAY LINE, TRUE OUTPUT, PDIP8 |
| 封裝： | 0.300 INCH, DIP-8 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 54K |
| 代理商： | DS1004M-5 |
DS1004
5 of 6
NOTES:
1. All voltages are referenced to ground.
2. VCC=5V and 25
°C. Delay accuracy on both the rising and falling edges within tolerances given in
Table 1.
3. Pulse width and duty cycle specifications may be exceeded, however, accuracy will be application
sensitive with respect to decoupling, layout, etc.
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
°C ±=3°C
Supply Voltage (VCC):
5.0V
±=0.1V
Input Pulse:
High = 3.0V
±=0.1V
Low = 0.0V
±=0.1V
Source Impedance:
50 ohm max.
Rise and Fall Time:
3.0 ns max. (measured between 0.6V and 2.4V)
Pulse Width:
500 ns
Pulse Period:
1
s
Output Load
Capacitance:
15 pF
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Data is measured at the 1.5V level on
the rising and falling edge.
NOTE:
Above conditions are for test only and do not restrict the devices under other data sheet conditions.
TIMING DIAGRAM: DS1004 INPUT TO OUTPUTS
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| DS1004Z-3/T&R | SILICON DELAY LINE, TRUE OUTPUT, PDSO8 |
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| DS10-04P | 制造商:Cooper Bussmann 功能描述:TOP SCREW-ON INSERTION BRIDGE, 4 POLE, F - Bulk 制造商:COOPER BUSSMANN 功能描述:TOP SCREW-ON INSERTION BRIDGE, 4 POLE, F |
| DS1004Z002 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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