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參數(shù)資料
| 型號： | DS1004M-4 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Delay Line |
| 英文描述： | SILICON DELAY LINE, TRUE OUTPUT, PDIP8 |
| 封裝： | 0.300 INCH, DIP-8 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大小： | 54K |
| 代理商： | DS1004M-4 |
DS1004
4 of 6
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
-1.0V to +7.0V
Operating Temperature
0
°C to 70°C
Storage Temperature
-55
°C to +125°C
Soldering Temperature
See J-STD-020A Specification
Short Circuit Output Current
50 mA for 1 second
* This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(0°C to 70°C; VCC = 5.0V ± 5%)
PARAMETER
SYM
TEST
CONDITION
MIN
TYP
MAX
UNITS
NOTES
Supply Voltage
VCC
4.75
5.00
5.25
V
1
Active Current
ICC
VCC=5.25V
Period=1 s
35
75
mA
High Level Input
Voltage
VIH
2.2
VCC + 0.5
V
1
Low Level Input
Voltage
VIL
-0.5
0.8
V
1
Input Leakage
II
0.0V
≤ V
I
≤ V
CC
-1.0
1.0
A
High Level Output
Current
IOH
VCC=4.75V
VOH=4V
-1.0
mA
Low Level Output
Current
IOL
VCC=4.75V
VOL=0.5V
12
mA
AC ELECTRICAL CHARACTERISTICS
(TA = 25°C; VCC = 5V ± 5%)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Period
tPERIOD
4 (tWI)ns
3
Input Pulse Width
tWI
40% of Tap 5 tPLH
ns
3
Input to Tap 1
Output Delay
tPLH,
tPHL
Table 1
ns
2
Tap-to-Tap Delays
tPLH
Table 1
ns
2
Output Rise or
Fall Time
tOR,
tOF
2.0
2.5
ns
Power-up Time
tPU
100
ms
CAPACITANCE
(TA = 25°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Capacitance
CIN
10
pF
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