參數(shù)資料
型號(hào)： DRM049
英文描述： Internet Connectivity with HCS12 16-bit Microcontroller using the ACP
中文描述： 互聯(lián)網(wǎng)連接與HCS12的16位微控制器使用非加太
文件頁(yè)數(shù)： 78/80頁(yè)
文件大?。?/td> 1025K
代理商： DRM049
Glossary
Designer Reference Manual
DRMxxx — Rev 0.0
78
Glossary
MOTOROLA
subroutine
— A sequence of instructions to be used more than once in the course of a program. The last
instruction in a subroutine is a return from subroutine (RTS) instruction. At each place in the main
program where the subroutine instructions are needed, a jump or branch to subroutine (JSR or
BSR) instruction is used to call the subroutine. The CPU leaves the flow of the main program to
execute the instructions in the subroutine. When the RTS instruction is executed, the CPU returns
to the main program where it left off.
synchronous
— Refers to logic circuits and operations that are synchronized by a common reference
signal.
TIM
— See “timer interface module (TIM).”
timer interface module (TIM)
— A module used to relate events in a system to a point in time.
timer
— A module used to relate events in a system to a point in time.
toggle
— To change the state of an output from a logic 0 to a logic 1 or from a logic 1 to a logic 0.
tracking mode
— Mode of low-jitter PLL operation during which the PLL is locked on a frequency. Also
see “acquisition mode.”
two’s complement
— A means of performing binary subtraction using addition techniques. The most
significant bit of a two’s complement number indicates the sign of the number (1 indicates
negative). The two’s complement negative of a number is obtained by inverting each bit in the
number and then adding 1 to the result.
unbuffered
— Utilizes only one register for data; new data overwrites current data.
unimplemented memory location
— A memory location that is not used. Writing to an unimplemented
location has no effect. Reading an unimplemented location returns an unpredictable value.
Executing an opcode at an unimplemented location causes an illegal address reset.
V
—The overflow bit in the condition code register of the CPU08. The CPU08 sets the V bit when a two's
complement overflow occurs. The signed branch instructions BGT, BGE, BLE, and BLT use the
overflow bit.
variable
— A value that changes during the course of program execution.
VCO
— See “voltage-controlled oscillator.”
vector
— A memory location that contains the address of the beginning of a subroutine written to service
an interrupt or reset.
voltage-controlled oscillator (VCO)
— A circuit that produces an oscillating output signal of a frequency
that is controlled by a dc voltage applied to a control input.
waveform
— A graphical representation in which the amplitude of a wave is plotted against time.
wired-OR
— Connection of circuit outputs so that if any output is high, the connection point is high.
word
— A set of two bytes (16 bits).
write
— The transfer of a byte of data from the CPU to a memory location.
X
— The lower byte of the index register (H:X) in the CPU08.
Z
— The zero bit in the condition code register of the CPU08. The CPU08 sets the zero bit when an
arithmetic operation, logical operation, or data manipulation produces a result of $00.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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