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  • 參數(shù)資料
    型號: DMA2271
    英文描述: Consumer IC
    中文描述: 消費性IC
    文件頁數(shù): 3/36頁
    文件大?。?/td> 496K
    代理商: DMA2271
    DMA 2271, DMA 2280, DMA 2281
    3
    The DMA 2271, DMA 2280, and DMA 2281 C/D/
    D2–MAC Decoders
    1. Introduction
    1.1. General Information
    Digital real–time signal processor for processing C/D/
    D2–MAC video, sound, and data signals digitized by the
    VCU 2133 Video Codec in digital CTV receivers accord-
    ing to
    INTERMETALL's
    DIGIT 2000 system of or in ana
    -
    log CTV re
    ceivers or in stand–alone C/D/D2–MAC de
    -
    coders (see
    Figs. 1–1 to 1–3).
    In order to receive TV channels transmitted via satellite
    or cable network using the newly established C/D/
    D2–MAC standards instead of PAL or SECAM, decod-
    ers are required for decoding the TV video and sound
    signals. The DMA 2271, DMA 2280, and DMA 2281 are
    suitable for this purpose, in conjunction with the DIGIT
    2000 digital TV system and also for stand–alone solu-
    tions.
    The DMA 2271 is only able to decode D2–MAC/packet
    signals, in contrast to the DMA 2280 which decodes D–
    MAC/packet signals and the DMA 2281 which decodes
    D2, D or C–MAC/packet signals.
    The DMA 2271, DMA 2280, and DMA 2281 are a pro-
    grammable circuits, produced in CMOS technology and
    housed in a 68–pin PLCC package. These decoders
    contain on a single silicon chip the following functions
    (see Fig. 1–4):
    – code converter
    – circuitry for clamping, AGC and PLL
    – chroma and luma store for expansion of the MAC sig-
    nal
    – chroma and luma interpolating filter
    – contrast multiplier with limiter for the luminance signal
    – color saturation multiplier with multiplexer
    – duobinary decoder (data slicer)
    – synchronization
    – descrambler and de–interleaver
    – packet linker
    – packet 0 buffer
    – sound decoder and sound multiplexer
    – IM bus interface circuit for communicating with the
    CCU
    1.2. Environment
    Fig. 1–1 shows the block diagram of a digital CTV receiv-
    er system DIGIT 2000, equipped with C/D/D2–MAC and
    Teletext, and suited for the PAL and SECAM standards.
    Stand–alone C/D/D2–MAC decoders are shown in Figs.
    1–2 and 1–3. These two versions can either be inte-
    grated into analog CTV receivers, or can serve as
    stand–alone C/D/D2–MAC decoders.
    CCU 3000
    NVM 3060
    1/2
    VCU 2136
    MCU 2600
    DPU 2553
    TPU 2735
    DRAM
    SPU 2243
    PVPU 2204
    DMA 2281
    1/2
    VCU 2136
    AMU 2481
    ACP 2371
    Video
    DRAM
    R
    G
    B
    Defl.
    S1
    Sound
    Fig. 1–1:
    Block diagram for a multistandard CTV re-
    ceiver according to the DIGIT 2000 system and
    equipped with D2–MAC
    CCU 3000
    VCU 2133
    A/D Part
    MCU 2600
    TPU 2735
    DRAM
    DMA 2281
    VCU 2133
    D/A Part
    AMU 2481
    Video
    DRAM
    R
    G
    B
    Defl.
    S1
    S3
    Fig. 1–2:
    Block diagram for a stand–alone C/D/
    D2–MAC decoder, equipped with the VCU 2133 Video
    Codec for A/D and D/A conversion (reduced chroma
    bandwidth)
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