參數(shù)資料
型號： DM93L24
文件頁數(shù)： 113/158頁
文件大小： 2668K
代理商： DM93L24
Switching Characteristics
V
CC
e a
5.0V, T
A
e a
25
§
C (See Section 1 for waveforms and load configurations)
Symbol
Parameter
C
L
e
15 pF
Units
Min
Max
t
PLH
t
PHL
Propagation Delay
S0 to Z
60
75
ns
t
PLH
t
PHL
Propagation Delay
S0 to Z
70
50
ns
t
PLH
t
PHL
Propagation Delay
E to Z
60
75
ns
t
PLH
t
PHL
Propagation Delay
E to Z
70
45
ns
t
PLH
t
PHL
Propagation Delay
In to Z
70
65
ns
t
PLH
t
PHL
Propagation Delay
In to Z
55
55
ns
Functional Description
The 93L12 is a logical implementation of a single pole, eight
position switch with the switch position controlled by the
state of three Select inputs, S0, S1, S2. Both assertion and
negation outputs are provided. The Enable input (E) is ac-
tive LOW. When it is not activated the negation output is
HIGH and the assertion output is LOW, regardless of all
other inputs. The logic function provided at the output is:
Z
e
E
#
(I0
#
S0
#
S1
#
S2
a
I1
#
S0
#
S1
#
S2
a
I2
#
S0
#
S1
#
S2
a
I3
#
S0
#
S1
#
S2
a
I4
#
S0
#
S1
#
S2
a
I5
#
S0
#
S1
#
S2
a
I6
#
S0
#
S1
#
S2
a
I7
#
S0
#
S1
#
S2).
The 93L12 provides the ability, in one package, to select
from eight sources of data or control information. By proper
manipulation of the inputs, the 93L12 can provide any logic
function of four variables and its negation. Thus any number
of random logic elements used to generate unusual truth
tables can be replaced by one 93L12.
Truth Table
Inputs
Outputs
E
S2
S1
S0
I0
I1
I2
I3
I4
I5
I6
I7
Z
Z
H
L
L
L
X
L
L
L
X
L
L
L
X
L
L
H
X
L
H
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
L
H
L
L
H
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
H
X
X
X
X
H
X
X
X
X
L
H
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
L
H
H
L
H
L
L
L
L
L
L
H
H
H
H
L
L
L
H
L
L
H
X
X
X
X
X
X
X
X
X
X
X
X
H
X
X
X
X
L
H
X
X
X
X
L
X
X
X
X
X
X
X
X
L
H
L
H
H
L
H
L
L
L
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
X
X
X
X
X
L
H
X
X
X
X
X
L
H
L
H
L
H
L
H
L
H
L
H
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
3
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