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參數(shù)資料
| 型號： | DM9301 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter |
| 中文描述： | 100Mbps以太網(wǎng)光纖/雙絞線收發(fā)器單芯片 |
| 文件頁數(shù)： | 7/22頁 |
| 文件大?。?/td> | 125K |
| 代理商： | DM9301 |
DM9301
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
Final 7
Version: DM9301-DS-F02
May 8, 2000
LED Interface(Continued)
52
TXERRLED#
OD
TX Error LED:
Indicates an error was detected by the TX Code Group
Alignment Monitor function on the TX receiver. Active
low (Open Drain Output)
The DM9301 incorporates a "monostable" function on
the TXERRLED output. This ensures that even
minimum size errors generate adequate LED ON to
insure visibility.
Diagnostic Port Interface
36
FXALPBK
I
FX Interface Analog Loop Back:
Loops the FX NRZI analog transmit data path to the FX
NRZI analog receive path.
Initiated at a H/W reset. Active high.
TX Interface Analog Loop Back:
Loops the TX NRZI analog transmit data path to the TX
NRZI analog receive path.
Initiated at a H/W reset. Active high.
FX Interface Digital Loop Back:
Loops the FX 5-bit symbol digital transmit data path to
the FX 5-bit symbol digital receive path.
Initiated at a H/W reset. Active high.
TX Interface Digital Loop Back:
Loops the TX 5-bit symbol digital transmit data path to
the TX 5-bit symbol digital receive path.
Initiated at a H/W reset. Active high.
Receive Data 4 through 0:
The receive data 5-bit symbol interface. Data is clocked
out on the falling edge of RXCLK.
Receive Clock:
25 Mhz recovered clock, clock source is selected by the
MUXCTL1 and MUXCTL0.
Transmit Data 4 through 0:
The transmit data 5-bit symbol interface. Data is clocked
in on the rising edge of TXCLK.
Transmit Clock:
25 Mhz recovered clock, clock source is selected by the
MUXCTL1 and MUXCTL0.
35
TXALPBK
I
96
FXDLPBK
I
97
TXDLPBK
I
79, 77,
76, 74,
73
70
RXD0, RXD1,
RXD2, RXD3,
RXD4
RXCLK
0
O
48, 47,
45, 44,
43
71
TXD0, TXD1,
TXD2, TXD3,
TXD4
TXCLK
I
O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9301F | 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter |
| DM9324 | 5-Bit Comparator |
| DM9324N | 5-Bit Comparator |
| DM9328 | Dual 8-Bit Shift Register |
| DM9328N | Dual 8-Bit Shift Register |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9301F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter |
| DM9301FP | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter |
| DM9301J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BCD-To-Decimal Decoder |
| DM9301J/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DM9301N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:1-OF-10 DECODERS |
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