參數(shù)資料
型號(hào)： DM9102D
廠商： Electronic Theatre Controls, Inc.
英文描述： SINGLE CHIP FAST ETHEMET NIC CONTROLLER
中文描述： 單晶片快速以太網(wǎng)NIC控制器
文件頁(yè)數(shù)： 13/70頁(yè)
文件大?。?/td> 2245K
代理商： DM9102D
Preliminary datasheet
Version: DM9102D-DS-P02
Jan. 14, 2005
13
31
0
R/C
Detected Parity Error
The DM9102D samples the AD[0:31], C/BE[0:3]#, and the PAR signal to
check parity and to set parity errors. In slave mode, the parity check falls
on command phase and data valid phase (IRDY# and TRDY# both
active). In master mode, the DM9102D will check each data phase, during
a memory read cycle, for parity error. During a memory write cycle, if an
error occurs, the PERR# signal will be driven by the target. This bit is set
by the DM9102D and cleared by writing "1". There is no effect by writing
"0"
Signal For System Error
This bit is set when the SERR# signal is driven by the DM9102D. This
system error occurs when an address parity is detected under the
condition that bit 8 and bit 6 in command register below are set
Master Abort Detected
This bit is set when the DM9102D terminates a master cycle with the
master-abort bus transaction
Target Abort Detected
This bit is set when the DM9102D terminates a master cycle due to a
target-abort signal from other targets
Send Target Abort (0 for No Implementation)
The DM9102D will never assert the target-abort sequence
DEVSEL Timing (01 Select Medium Timing)
Medium timing of DEVSEL# means the DM9102D will assert DEVSEL#
signal two clocks after FRAME# is sample “asserted”
Data Parity Error Detected
This bit will take effect only when operating as a master and when a Parity
Error Response Bit in command configuration register is set. It is set under
two conditions:
(i) PERR# asserted by the DM9102D in memory data read error
(ii) PERR# sent from the target due to memory data write error
Slave Mode Fast Back-To-Back Capable (0 for No Support)
This bit is always reads "1" to indicate that the DM9102D is capable of
accepting fast back-to-back transaction as a slave mode device
User-Definable Feature Supported (0 for No Support)
66 MHz (0 for No Capability)
New Capability
This bit indicates whether this function implements a list of extended
capabilities such as PCI power management. This bit may be updated by
EEPROM. When set this bit indicates the presence of New Capability. A
value of 0 means that this function does not implement New Capability
Reserved
Master Mode Fast Back-To-Back (0 for No Support)
The DM9102D does not support master mode fast back-to-back
capability and will not generate fast back-to-back cycles
SERR# Driver Enable/Disable
This bit controls the assertion of SERR# signal output. The SERR# output
will be asserted on detection of an address parity error and if both this bit
and bit 6 are set
Address/Data Stepping (0 for No Stepping)
Parity Error Response Enable/Disable
Setting this bit will enable the DM9102D to assert PERR# on the detection
30
0
R/C
29
0
R/C
28
0
R/C
27
0
R/C
26:25
01
R/C
24
0
R/C
23
0
RO
22
21
20
0
0
1
RO
RO
RO
19:10
9
0
0
RO
RO
8
0
RW
7
6
0
0
RO
RW
相關(guān)PDF資料
PDF描述
DM9102DE SINGLE CHIP FAST ETHEMET NIC CONTROLLER
DM9102 Single Chip Fast Ethernet NIC controller
DM9102A Single Chip Fast Ethernet NIC controller
DM9102AF Single Chip Fast Ethernet NIC controller
DM9102AT Single Chip Fast Ethernet NIC controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9102DE 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
DM9102DEP 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes
DM9102H 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
DM9102HEP 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
DM9103 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:10/100 Mbps 3-port Ethernet Switch Controller with PCI Interface
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