
DM9095
Twisted-Pair Medium Attachment Unit
3
Final
Version: DM9095-DS-F02
August 21, 2000
Pin Description
Pin No.
Pin Name
I/O
Description
1
GND
-
Ground
2
3
DO+
DO-
I
Transmitter input. A balanced differential line receiver input pair
from the AUI circuit that receives 10 Mbits/s Manchester-encoded
data and applies the data to the TP cable.
4
MD0
I
Operation mode selection pin. Pulled high internally.
5
LI-
Link-Integrity enable. The pin is a dual function pin that
determines whether the link integrity function should be realized.
When this pin, which is internally pulled-high, is configured as an
input pin and tied low, the link integrity test function is enabled.
While configured as an output pin, the pin drives low for link-fail
state and drives high for link-pass state. The output pin can drive
an LED status indicator, as in Figure 3(b) (page 6).
6
7
DI+
DI-
O
Receiver outputs. A balanced output current driver pair to the AUI
transceiver cable with the 10 Mbits/s Manchester-encoded data
received from the twisted-pair of the network.
8
9
CI+
CI-
O
Collision outputs. Balanced differential line driver outputs which
send a 10MHz oscillation signal to the Manchester
encoder/decoder in the event of a collision, jabber interrupt, or
heartbeat test.
10
VDD
-
+5V Power Supply
11
AP
I/O
Auto Polarity. This pin is a dual function pin which determines if
the auto-polarity function should be enabled. The function is
enabled if the pin is HIGH. The pin is also capable of driving an
LED if the function is enabled.
12
JLED
O
Jabber indicator. Normally off. It indicates a time-out
transmission onto TP network. It turns on if the watchdog timer
has timed out and the twisted-pair driver has been disabled.
13
OSC1
I
Crystal pin. This pin is a 20MHz frequency-reference terminal for
internal chip timing.
14
GND
-
Ground