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參數(shù)資料
| 型號： | DM74S299N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3-STATE 8-Bit Universal Shift/Storage Register |
| 中文描述： | S SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-20 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 58K |
| 代理商： | DM74S299N |
www.fairchildsemi.com
2
D
Function Table
a...h
=
The level of the steady-state input at inputs A through H, respectively. These data are loaded into the flip-flops while the flip-flop outputs are isolated
from the input/output terminals.
H
=
HIGH Level
L
=
LOW Logic Level
X
=
Either LOW or HIGH Logic Level
Q
A0
...Q
H0
=
The output logic level of Q
X
before the indicated input conditions were established.
Q
An
...Q
Hn
=
The output logic level before the active transition (
↑
) of the clock input.
Note 1:
When one or both output controls are HIGH the eight input/output terminals are disabled to the high-impedance state; however, sequential operation
or clearing of the register is not affected
Logic Diagram
Inputs
Output
Control
Inputs/Outputs
Outputs
Mode
Function
Select
Clear
Clock
Serial
A/Q
A
B/Q
B
C/Q
C
D/Q
D
E/Q
E
F/Q
F
G/Q
G
H/Q
H
Q
A
′
Q
H
′
S1
S0
G1
(Note 1)
L
L
L
L
L
G2
(Note 1)
L
L
L
L
L
SL SR
Clear
L
L
H
H
H
X
L
L
X
L
L
X
L
X
H
X
X
X
L
↑
X
X
X
X
X
X
X
X
X
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Hold
Q
A0
Q
A0
H
Q
B0
Q
B0
Q
An
Q
C0
Q
C0
Q
Bn
Q
D0
Q
D0
Q
Cn
Q
Dn
Q
En
Q
E0
Q
F0
Q
E0
Q
F0
Q
G0
Q
G0
Q
Fn
Q
H0
Q
A0
Q
H0
Q
H0
Q
A0
Q
H0
Q
Gn
H Q
Gn
Shift
Right
H
H
L
H
H
L
L
L
L
L
↑
↑
X
H
L
X
L
Q
An
Q
Cn
Q
Bn
Q
Dn
Q
Cn
Q
Dn
Q
En
Q
En
Q
Fn
Q
Gn
Q
Fn
Q
Hn
Q
Gn
H
L
Q
Gn
H
Shift
Left
Q
Bn
Q
Bn
H
H
H
H
L
H
L
X
L
X
↑
↑
L
X
X
X
Q
Bn
a
Q
Cn
b
Q
Dn
c
Q
En
d
Q
Fn
Q
Gn
e
Q
Hn
g
L
h
Q
Bn
a
L
h
Load
f
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74S299 | 3-STATE 8-Bit Universal Shift/Storage Register(三態(tài)輸出的8位通用移位/存儲寄存器) |
| DM74S30 | 8-Input NAND Gate(八輸入與非門) |
| DM74S30N | 8-Input NAND Gate |
| DM74S32 | Quad 2-Input OR Gate(四2輸入或門) |
| DM74S374 | 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops(三態(tài)輸出的八D型通用緩沖器和邊緣觸發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74S30 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74S30N | 功能描述:邏輯門 8-Input NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74S32 DIE | 制造商:Texas Instruments 功能描述: |
| DM74S32 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74S32N | 功能描述:邏輯門 Quad 2-Input OR Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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