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參數資料
| 型號： | DM74LS73A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs(帶清零和互補輸出的雙負邊緣觸發(fā)的主-從J-K觸發(fā)器) |
| 中文描述： | 雙下降沿觸發(fā)主從JK觸發(fā)器明確和互補輸出（帶清零和互補輸出的雙負邊緣觸發(fā)的主-從JK觸發(fā)器） |
| 文件頁數： | 2/5頁 |
| 文件大?。?/td> | 53K |
| 代理商： | DM74LS73A |
www.fairchildsemi.com
2
D
Absolute Maximum Ratings
(Note 1)
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2:
C
L
=
15 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Note 3:
C
L
=
50 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Note 4:
The symbol (
↓
) indicates the falling edge of the clock pulse is used for reference.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0
°
C to
+
70
°
C
65
°
C to
+
150
°
C
Symbol
Parameter
Min
4.75
2
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 2)
Clock Frequency (Note 3)
Pulse Width
(Note 2)
0.8
0.4
8
30
25
0
0
20
25
25
25
30
30
20
↓
25
↓
0
↓
5
↓
0
Clock HIGH
Preset LOW
Clear LOW
Clock HIGH
Preset LOW
Clear LOW
ns
t
W
Pulse Width
(Note 3)
ns
t
SU
t
SU
t
H
t
H
T
A
Setup Time (Note 2)(Note 4)
Setup Time (Note 3)(Note 4)
Hold Time (Note 2)(Note 4)
Hold Time (Note 3)(Note 4)
Free Air Operating Temperature
ns
ns
ns
ns
°
C
70
相關PDF資料 |
PDF描述 |
|---|---|
| DM74LS73AM | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
| DM74LS73AN | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
| DM74LS73AMX | J-K-Type Flip-Flop |
| DM74LS74A | Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs(帶清零和互補輸出的雙負邊緣觸發(fā)的主-從J-K觸發(fā)器) |
| DM74LS74 | Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DM74LS73A WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74LS73AM | 功能描述:觸發(fā)器 Dual J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| DM74LS73AN | 功能描述:觸發(fā)器 Dual J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| DM74LS74 WAF | 制造商:Texas Instruments 功能描述: |
| DM74LS74A WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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