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參數(shù)資料
| 型號(hào)： | DM74LS299WM |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Input Universal Shift/Storage Register with |
| 中文描述： | LS SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 65K |
| 代理商： | DM74LS299WM |
www.fairchildsemi.com
2
D
Functional Description
The DM74LS299 contains eight edge-triggered D-type flip-
flops and the interstage logic necessary to perform syn-
chronous shift left, shift right, parallel load and hold opera-
tions. The type of operation is determined by the S0 and
S1, as shown in the Mode Select Table. All flip-flop outputs
are brought out through 3-STATE buffers to separate I/O
pins that also serve as data inputs in the parallel load
mode. Q0 and Q7 are also brought out on other pins for
expansion in serial shifting of longer words.
A LOW signal on MR overrides the Select and CP inputs
and resets the flip-flops. All other state changes are initi-
ated by the rising edge of the clock. Inputs can change
when the clock is in either state provided only that the rec-
ommended setup and hold times, relative to the rising edge
of CP, are observed.
A HIGH signal on either OE1 or OE2 disables the 3-STATE
buffers and puts the I/O pins in the high impedance state.
In this condition the shift, hold, load and reset operations
can still occur. The 3-STATE buffers are also disabled by
HIGH signals on both S0 and S1 in preparation for a paral-
lel load operation.
Mode Select Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Clock (CP) Transition
Logic Diagram
Inputs
Response
MR
L
H
H
H
H
S1 S0 CP
X
X
H
H
L
H
H
L
L
L
X
Asynchronous Reset; Q0–Q7
=
LOW
Parallel Load; I/O
n
→
Q
n
Shift Right; D
S0
→
Q0, Q0
→
Q1, etc.
Shift Left; D
S7
→
Q7, Q7
→
Q6, etc.
Hold
X
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參數(shù)描述 |
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| DM74LS299WMX | 功能描述:計(jì)數(shù)器移位寄存器 8-Input Sft/Stor Reg RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| DM74LS30 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74LS30M | 功能描述:邏輯門 8-Input NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74LS30MX | 功能描述:邏輯門 8-Input NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74LS30N | 功能描述:邏輯門 8-Input NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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