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參數(shù)資料
| 型號： | DM74ALS175SJX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad D-Type Flip-Flop |
| 中文描述： | ALS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SOP-16 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 73K |
| 代理商： | DM74ALS175SJX |
www.fairchildsemi.com
4
D
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25
°
C.
Symbol
Parameter
Switching Characteristics
over recommended operating free air temperature range
Conditions
Min
Typ
Max
Units
V
IK
V
OH
Input Clamp Voltage
HIGH Level
Output Voltage
V
CC
=
4.5V, I
IN
=
18 mA
I
OH
=
400
μ
A
V
CC
=
4.5V to 5.5V
1.5
V
V
CC
2
V
CC
1.6
V
V
OL
LOW Level
Output Voltage
Input Current at
V
CC
=
4.5V
I
OL
=
8 mA
0.35
0.5
V
I
I
V
CC
=
5.5V, V
IN
=
7V
0.1
mA
Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
I
IH
I
IL
I
O
I
CC
V
CC
=
5.5V, V
IH
=
2.7V
V
CC
=
5.5V, V
IN
=
0.4V
V
CC
=
5.5V, V
O
=
2.25V
V
CC
=
5.5V
Clock
=
4.5V
Clear
=
GND
D Input
=
GND
20
0.1
112
μ
A
mA
Output Drive Current
Supply Current
30
mA
DM74ALS174
11
19
mA
DM74ALS175
8
14
Symbol
Parameter
Conditions
Min
Max
Units
f
MAX
t
PLH
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level
R
L
=
500
C
L
=
50 pF
V
CC
=
4.5V to 5.5V
50
MHz
5
18
ns
Output From Clear (175 Only)
Propagation Delay Time
HIGH-to-LOW Level
t
PHL
8
23
ns
Output From Clear
Propagation Delay Time
LOW-to-HIGH Level
t
PLH
3
15
ns
Output From Clock
Propagation Delay Time
HIGH-to-LOW Level
t
PHL
5
17
ns
Output From Clock
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