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參數(shù)資料
| 型號： | DM7476N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs |
| 中文描述： | TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-16 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大小： | 41K |
| 代理商： | DM7476N |
3
www.fairchildsemi.com
D
Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
Symbol
Parameter
From (Input)
R
L
=
400
, C
L
=
15 pF
Min
15
Units
To (Output)
Max
f
MAX
t
PHL
Maximum Clock Frequency
MHz
Propagation Delay Time
Preset to Q
40
ns
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
t
PLH
Preset to Q
25
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Clear to Q
40
ns
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Clear to Q
25
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Clock to Q or Q
40
ns
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Clock to Q or Q
25
ns
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DM7476N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| DM7476N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop |
| DM7476W | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs |
| DM7483J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Binary Adder |
| DM7483N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Binary Adder |
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