
DM336P
V.34 Integrated Data/ Fax/Voice/Speakerphone Modem Device Set
Final
Version: DM336P-DS-F02
August 15, 2000
7
DM6383 Pin Description
(continued)
Pin No.
47
53
54
55
Pin Name
P0.0
RXD
TXD
ALE/P
I/O
O
I
O
O
Description
Modem Control Output
(memory map is bit 4 of DAA)
Controller Serial Port Data Input
Controller Serial Port Data Output
Controller Address Latch Enable:
Output pulse for latching the low byte of the address during
accesses to the external memory.
Controller Program Store Enable:
This output goes low during a fetch from external program memory.
Controller External Data Memory Write Control
Controller External Data Memory Read Control
Interrupt Request
(see description of pin 26)
Controller Address Bus
Controller Address Bus
Controller Data Bus
Transmitter Baud Rate Clock Input
(Controller INT 0)
Receiver Baud Rate Clock Input
(Controller INT 1)
DSP Reset Output
Modem Control Output
(Memory map is bit 1-2 of DAA at memory
address D000H)
System Address:
These signals are connected to the bus of the PC I/O slot. They are
used to select the DM6383 I/O ports.
PnP Mode Enable:
This pin will be detected to enable/disable the PnP mode. When it
is pulled down by a resistor (3.3K ~ 4.7K), the DM6383 can enter
the PnP mode when it receives the PnP initial key sequence. When
disconnected, an internal pull up will disable the Plug and Play
function.
TX DSP Register Select Output:
Memory address mapping of the controller is F000H.
Modem Control Port Select Output:
Memory address mapping of the controller is D800H.
Test Pin:
Used for system configuration and test mode
56
/PSEN
O
57
58
59
/WR
/RD
IRQ3
O
O
O
O
O
I/O
I
I
O
O
60 - 67
69 - 76
77 - 84
86
87
88
89, 90
CA15 - CA8
CA7 - CA0
D7 - D0
TXRCLK
RXRCLK
/POR
SEL1, SEL2
91 - 94
A12 - A15
I
95
/PNPEN
I
97
/TUCS
O
98
PS1
O
99
TEST1
I
TEST2
0
0
1
1
TEST1
0
1
0
1
System Configuartion
Internal mode
External mode
Test mode
Test mode