
5) The MAX2402 SHDN pin connects to V
CC
 through a
jumper and 100
. To test the shutdown function,
ensure that either W1 or W2 is removed, which will
prevent current draw through R6, R7, and R8. When
the SHDN jumper is removed and the SHDN test
point is grounded, the supply current should drop
below 1μA. 
6) The modulated spectrum can be examined on the
spectrum analyzer by removing the shorting termina-
tion and supplying a modulation signal to the SMA
MOD input. The MOD input is linear from approxi-
mately 1.5V to 3.5V, and has a bandwidth of DC to
25MHz. The MOD input is self-biasing to approxi-
mately V
CC
/2. Any offset at the MOD input from a
symmetric signal around the self-bias voltage will act
as an offset and cause less than optimal carrier
rejection. Capacitive coupling into the MOD input
will eliminate this situation and result in optimum car-
rier rejection. The MOD input will act as an attenua-
tor if it is left open.
Adjustments and Control
VGC
The VGC jumper (W3) shorts the VGC input of the
MAX2402 to V
CC
. The VGC test point can be used to
manipulate the gain control voltage. The VGC jumper
(W3) should be removed before trying to control this
VGC voltage. It connects to V
CC
 when in place.
SHDN
The SHDN jumper (W4) shorts the SHDN input to V
CC
to keep the part in normal operating condition. The
SHDN test point can be used with a controlling voltage
to power down the MAX2402. The SHDN jumper (W4)
should be removed when adjusting the voltage on the
test pin. It connects to V
CC
 when in place.
BADJ
The two bias adjust jumpers connect either end of the
1k
 potentiometer to V
CC
 and GND through 50
 resis-
tors. The wiper on the potentiometer has been factory
adjusted to provide 2V to the BADJ  input on the
MAX2402. The BADJ  test point is for monitoring the
BADJ  voltage. The BADJ  jumpers (W1, W2) connect R8
to V
CC
 and GND, respectively. BADJ  voltage is altered
by adjusting the R8 potentiometer. 
Layout Considerations
The evaluation board can serve as a guide for layout of
your board. The following considerations were taken into
account on the evaluation board. C3, C4, and C5 should
be small surface-mount capacitors, placed directly from
each V
CC
 pin to the adjacent ground. Place them as
close to the MAX2402 as possible, and make connec-
tions directly to the pins (not through vias or long traces).
C6, C7, and C8 should also be surface mount. C7
should be next to C3. C8 and C9 should be located at
the V
CC
 terminal of choke L2. If the LO is driven single-
ended, ground the unused LO port. If a single resistor is
used to bias BADJ , it may be necessary to AC couple
BADJ  to ground with a low-value capacitor, since the
high-impedance at the BADJ  node may be sensitive to
circuit noise. Although the evaluation board uses four
layers, it is certainly possible to use two.
E
MAX 2402 Evaluation K it
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