參數(shù)資料
型號(hào): DG2799DN-T1-E4
廠商: Vishay Intertechnology,Inc.
英文描述: 0.25-OHM CMOS, 1.65-V to 4.3-V, Dual DPDT Analog Switch
中文描述: 0.25歐姆的CMOS,1.65 V至4.3 - V的雙DPDT模擬開關(guān)
文件頁數(shù): 1/8頁
文件大?。?/td> 86K
代理商: DG2799DN-T1-E4
IN1, IN2
NO4
COM2
NO2
NC3
IN3, IN4
NC1
COM4
1
2
3
12
11
10
4
9
5
6
7
8
16
15
14
13
NC2
GND
Top View
NO3 COM3
COM1 NO1
V+
NC4
DG2799
QFN-16 (3 X 3)
NOTE:
Underside exposed pad has no device electrical connection. It
is recommended that no electrical connection is made to it.
DG2799
Vishay Siliconix
New Product
Document Number: 72922
S-41957—Rev. B, 25-Oct-04
www.vishay.com
1
0.25- CMOS, 1.65-V to 4.3-V, Dual DPDT Analog Switch
FEATURES
Low Voltage Operation (1.65 V to 4.3 V)
Low On-Resistance - r
ON:
0.25 @ 2.7 V
Fast Switching:
t
ON
= 28 ns
t
OFF
= 17 ns
QFN-16 (3x3) Package
Latch-Up Current >300 mA (JESD78)
BENEFITS
Reduced Power Consumption
High Accuracy
Reduce Board Space
TTL/1.8-V Logic Compatible
High Bandwidth
APPLICATIONS
Cellular Phones
Speaker Headset Switching
Audio and Video Signal Routing
PCMCIA Cards
Battery Operated Systems
DESCRIPTION
The DG2799 is a dual double-pole/double-throw monolithic
CMOS analog switch designed for high performance switching
of analog signals. Combining low power, high speed, low
on-resistance and small physical size, the DG2799 is ideal for
portable and battery powered applications requiring high
performance and efficient use of board space.
The DG2799 is built on Vishay Siliconix’s low voltage process. An
epitaxial layer prevents latchup. Break-before-make is
guaranteed.
The switch conducts equally well in both directions when on,
and blocks up to the power supply level when off.
As a committed partner to the community and the environment,
Vishay Siliconix manufactures this product with the lead (Pb)-free
device terminations. For analog switching products
manufactured in QFN packages, the lead (Pb)-free “
E3/E4”
suffix is being used as a designator. Lead (Pb)-free QFN
products purchased at any time will have either a
nickel-palladium-gold device termination or a 100% matte tin
device termination. The different lead (Pb)-free materials are
interchangeable and meet all JEDEC standards for reflow and
MSL rating.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
TRUTH TABLE
Logic
NC1, 2, 3 and 4
NO1, 2, 3 and 4
0
ON
OFF
1
OFF
ON
ORDERING INFORMATION
Temp Range
Package
Part Number
-40 to 85
°
C
16-Pin QFN (3 x 3 mm)
Variation 2
DG2799DN-T1—E3/E4
相關(guān)PDF資料
PDF描述
DG2799 Dual double-pole / double-throw analog switches;
DG2 Standard Sinterglass Diode
DG3000-T1 MICRO FOOT 3x2: 0.5-mm PITCH, 0.165-mm BUMP HEIGHT
DG3001-T1 MICRO FOOT 3x2: 0.5-mm PITCH, 0.165-mm BUMP HEIGHT
DG3002-T1 MICRO FOOT 3x2: 0.5-mm PITCH, 0.165-mm BUMP HEIGHT
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