參數(shù)資料
型號(hào): DEMO9S08LL16
廠商: Freescale Semiconductor
文件頁數(shù): 6/44頁
文件大?。?/td> 0K
描述: BOARD DEMO FOR MC9S08LL16 MCU
產(chǎn)品培訓(xùn)模塊: LCD Design Solutions
MC9S08LL64/36 LCD MCU Introduction
標(biāo)準(zhǔn)包裝: 1
系列: HCS08
類型: MCU
適用于相關(guān)產(chǎn)品: MC9S08LL16
所含物品: 板,線纜,DVD
產(chǎn)品目錄頁面: 730 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: MC9S08LG16CLF-ND - IC MCU 8BIT LG16 FLASH 48-LQFP
MC9S08LG16CLH-ND - IC MCU 8BIT LG16 FLASH 64-LQFP
MC9S08LL16 Series MCU Data Sheet, Rev. 7
Electrical Characteristics
Freescale Semiconductor
14
11
P
Input leakage
current
all input only pins except for
LCD only pins (LCD 16-29)
|IIn|
VIn = VDD
—0.025
1
μA
VIn = VSS
—0.025
1
μA
LCD only pins (LCD 16-29)
VIn = VDD
100
150
μA
VIn = VSS
—0.025
1
μA
12
P
Hi-Z (off-state)
leakage
current
all input/output
(per pin)
|IOZ|VIn = VDD or VSS
—0.025
1
μA
13
P
Total leakage
current3
Total leakage current for all
pins
|IInT|VIn = VDD or VSS
2
μA
14
P Pullup,
pulldown
resistors when
enabled
PTA[0:3], PTA[6:7],
PTB[0:7], PTC[0:7]
RPU,
RPD
17.5
52.5
k
Ω
P
PTA[4:5], PTD[0:7],
PTE[0:7]
69.5
15
D
DC injection
current 4, 5, 6
Single pin limit
IIC
VIN < VSS, VIN > VDD
–0.2
0.2
mA
Total MCU limit, includes
sum of all stressed pins
–5
5
mA
16
C Input capacitance, all pins
CIn
——
8
pF
17
C RAM retention voltage
VRAM
—0.6
1.0
V
18
C POR re-arm voltage7
VPOR
0.9
1.4
2.0
V
19
D POR re-arm time
tPOR
10
μs
20
P Low-voltage detection threshold
VLVD
VDD falling
VDD rising
1.80
1.88
1.84
1.92
1.88
1.96
V
21
P Low-voltage warning threshold
VLVW
VDD falling
VDD rising
2.08
2.14
2.2
V
22
P Low-voltage inhibit reset/recover hysteresis
Vhys
—80—
mV
23
P Bandgap voltage reference8
VBG
1.15
1.17
1.18
V
1 Typical values are measured at 25
°C. Characterized, not tested
2 All I/O pins except for LCD pins in open drain mode.
3 Total leakage current is the sum value for all GPIO pins. This leakage current is not distributed evenly across all pins but
characterization data shows that individual pin leakage current maximums are less than 250 nA.
4 All functional non-supply pins, except for PTB2 are internally clamped to V
SS and VDD.
5 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
6 Power supply must maintain regulation within operating V
DD range during instantaneous and operating maximum current
conditions. If the positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure that external VDD load will shunt current greater than maximum
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
7 POR will occur below the minimum voltage.
8 Factory trimmed at V
DD = 3.0 V, Temp = 25 °C.
Table 8. DC Characteristics (continued)
Num C
Characteristic
Symbol
Condition
Min
Typ1
Max
Unit
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