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參數(shù)資料
| 型號： | DEM-DAC90X |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Evaluation Fixture for the DAC900, DAC902, DAC904, DAC908(DAC900, DAC902, DAC904, DAC908的評估夾具) |
| 中文描述： | 評價夾具的DAC900，DAC902，DAC904，DAC908（DAC900，DAC902，DAC904，DAC908的評估夾具） |
| 文件頁數(shù)： | 3/11頁 |
| 文件大?。?/td> | 377K |
| 代理商： | DEM-DAC90X |
3
DEM-DAC90xU, E
with a +3V digital supply, care must be taken that the digital
input data is set to the appropriate logic level. The logic
HIGH level must not exceed the power supplies by more
than 0.3V. Refer to the product data sheet for more details.
In addition to the DAC90x’s supply connections (P1, P2), a
third connector labeled P3 is used to power the output
amplifier circuit (U2) and the optional external reference
circuit. This section typically requires a dual
±
5V supply
voltage.
The analog and digital supplies as well as their respective
grounds are distributed by power planes. The best perfor-
mance is achieved when the analog and digital power is
supplied by separate power supplies.
GROUNDING
The DEM-DAC90x uses separate ground planes for the
analog and digital supplies. The ground planes are joined
together at a star point located under the DAC90x (U1) (see
Figures 7 and 11, Ground Plane Layouts).
DATA INPUT CONFIGURATION
The digital inputs of the DAC90x accept standard positive
binary coding. For example, an input of all 1s will result in
a full-scale output current at I
OUT
, with the complementary
output I
OUT
at zero output current. The inputs are CMOS
compatible, and the logic threshold will vary according to
the applied digital supply voltage, V
TH
= +V
D
/ 2 (
±
20%).
Inserted between the connector CN1 and the DAC90x are
series resistor networks RP1 and RP2. If ac-coupling is
desired, RP1 and RP2 should be removed and coupling
capacitors (C30 through C44) should be assembled to the
backside of the evaluation board. Resistor networks RN3,
RN4, RN7 and RN8 should be used to set up the correct bias
voltage for the ac-coupled digital data.
The digital inputs on the evaluation board include a set of
pull-up and pull-down resistor networks (RN1, RN2, RN5
and RN6). Use the pull-down resistor to interface the evalu-
ation board to 5V logic levels from the generator while the
DAC90x digital supply voltage is at 3V. Or, use the pull-up
resistors to drive 3V logic levels when the DAC90x is
operating with a 5V logic supply.
In any case, the applied digital input signal must be properly
terminated to insure clean edges and avoid ringing.
CLOCK INPUT
The maximum update rate for all DAC90x models is
200MSPS when the converter is supplied with +5V, and
165MSPS when operated on a +3V supply. A proper clock
signal must be provided to the DAC90x through SMA
connector J1. This input is terminated with 50
and the
clock signal is fed to the DAC90x with position ‘A’ of solder
jumper JP7 closed. Alternatively, a clock signal may be
applied through connector CN1. In this case, close jumper
JP7 in its “B” position. The recommended clock signal
should be a square wave with a 50% duty cycle. Care should
be taken to ensure that the clock signal has minimal under-
shoot and overshoot, which otherwise can degrade the
DAC90x performance. In addition, the clock should have
low phase noise (jitter), especially when operating the
DAC90x at high update rates and output frequencies.
SIGNAL OUTPUT CONFIGURATION
The analog signal output of the DAC90x can be configured
to drive a resistive load, a transformer, an operational ampli-
fier, or other output configuration, as long as the limitations
set by the output voltage compliance and full-scale range are
not exceeded.
The optimum dynamic performance of the DAC90x is
achieved with the outputs used differentially. The evaluation
board is configured to operate with transformer output
coupling.
This configuration was chosen because it utilizes both con-
verter outputs, reduces the effect of even order harmonics,
and offers a convenient method of converting the differential
outputs to a single-ended signal. The selected transformer
model (Mini-Circuits, ADT1-1WT) has a turns ratio of 1:1
and its lower and upper –3dB frequencies are at approxi-
mately 400kHz and 800MHz, respectively (1 to 400MHz for
a –1dB insertion loss). Shown in Figure 2 is the typical
DAC90x output configuration available on the evaluation
board. Both outputs of the DAC90x are terminated with 50
resistors. The voltage swing developed between the outputs
is applied to the primary side of the transformer, with its
center tap grounded. This causes the output signal to be
centered at ground, allowing for a maximum headroom to
the compliance voltage boundaries. The termination resis-
tors R3 and R4 may be removed and resistor R7 be used
instead. This necessitates that the center tap of the trans-
former is grounded to ensure a dc-path for the signal current
to the analog ground.
22
21
DAC90x
T1
1:1
ADT1-1WT
J7
R
7(1)
R
4
49.9
NOTE: (1) R
7
, C
16
, C
17
Open.
V
OUT
C
17(1)
R
3
49.9
C
16(1)
FIGURE 2. Typical Transformer Coupled Output Configuration.
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