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參數(shù)資料
| 型號(hào)： | DCR1277SD36 |
| 廠商： | DYNEX SEMICONDUCTOR LTD |
| 元件分類： | 晶閘管 |
| 英文描述： | Phase Control Thyristor |
| 中文描述： | 1977 A, 3600 V, SCR |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 69K |
| 代理商： | DCR1277SD36 |
DCR1277SD
1/9
APPLICATIONS
I
High Power Drives.
I
High Voltage Power Supplies.
I
DC Motor Control.
FEATURES
I
Double Side Cooling.
I
High Surge Capability.
I
High Mean Current.
I
Fatigue Free.
VOLTAGE RATINGS
KEY PARAMETERS
V
DRM
I
T(AV)
I
dVdt*
dI/dt
3600V
1259A
23750A
300V/
μ
s
150A/
μ
s
Outline type code: D.
See Package Details for further information.
*Higher dV/dt selections available
DCR1277SD36
DCR1277SD35
DCR1277SD34
DCR1277SD33
DCR1277SD32
Conditions
T
vj
= 0 to 125C,
I
DRM
= I
RRM
= 150mA,
V
DRM
, V
RRM
t
p
= 10ms,
V
DSM
& V
RSM
=
V
& V
+ 100V
respectively
Lower voltage grades available.
Type Number
Repetitive Peak
Voltages
V
DRM
V
RRM
V
3600
3500
3400
3300
3200
CURRENT RATINGS
T
case
= 60C unless stated otherwise.
Symbol
Parameter
Conditions
Double Side Cooled
I
T(AV)
Mean on-state current
I
T(RMS)
RMS value
I
T
Continuous (direct) on-state current
Single Side Cooled (Anode side)
I
T(AV)
Mean on-state current
I
T(RMS)
RMS value
I
T
Continuous (direct) on-state current
Units
Max.
Half wave resistive load
1259
A
-
1977
A
-
1832
A
Half wave resistive load
885
A
-
1390
A
-
1209
A
DCR1277SD
Phase Control Thyristor
Replaces March 1998 version, DS4552-3.3
DS4552-4.0 January 2000
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PDF描述 |
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| DCR1277SD | Phase Control Thyristor |
| DCR1279SD44 | Phase Control Thyristor |
| DCR1279SD45 | Phase Control Thyristor |
| DCR1279SD46 | Phase Control Thyristor |
| DCR1279SD47 | Phase Control Thyristor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DCR1279SD | 制造商:DYNEX 制造商全稱:Dynex Semiconductor 功能描述:Phase Control Thyristor |
| DCR1279SD44 | 制造商:DYNEX 制造商全稱:Dynex Semiconductor 功能描述:Phase Control Thyristor |
| DCR1279SD4444 | 制造商:n/a 功能描述:Thyristor |
| DCR1279SD45 | 制造商:DYNEX 制造商全稱:Dynex Semiconductor 功能描述:Phase Control Thyristor |
| DCR1279SD45451174 | 制造商:DUOTRON 功能描述:4400V 1.55Ka SCR MU400 |
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