參數(shù)資料
型號(hào): DC941A
廠商: Linear Technology
文件頁數(shù): 21/32頁
文件大小: 0K
描述: BOARD DELTA SIGMA ADC LTC2482
軟件下載: QuikEval System
設(shè)計(jì)資源: DC941A Design File
DC941A Schematic
標(biāo)準(zhǔn)包裝: 1
系列: Easy Drive™, QuikEval™
ADC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 6.8
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
工作溫度: 0°C ~ 70°C
已用 IC / 零件: LTC2482
已供物品:
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LTC2482IDD#PBF-ND - IC ADC 16BIT 10-DFN
LTC2482CDD#PBF-ND - IC ADC 16BIT 10-DFN
LTC2482
28
2482fc
APPLICATIONS INFORMATION
(referred to the LTC2482 input) can now be obtained by
summing as square root of sum of squares the three ADC
input referred noise sources: the LTC2482 internal noise,
the noise of the IN+ driving amplier and the noise of the
IN– driving amplier.
If the fO pin is driven by an external oscillator of frequency
fEOSC, Figure 26 can still be used for noise calculation if
the x-axis is scaled by fEOSC/307200. For large values of
the ratio fEOSC/307200, the Figure 26 plot accuracy begins
to decrease, but at the same time the LTC2482 noise oor
rises and the noise contribution of the driving ampliers
lose signicance.
Normal Mode Rejection and Antialiasing
One of the advantages delta-sigma ADCs offer over
conventional ADCs is on-chip digital ltering. Combined
with a large oversampling ratio, the LTC2482 signicantly
simplies antialiasing lter requirements. Additionally,
the input current cancellation feature of the LTC2482 al-
lows external lowpass ltering without degrading the DC
performance of the device.
The SINC4 digital lter provides greater than 120dB normal
mode rejection at all frequencies except DC and integer
multiples of the modulator sampling frequency (fS). The
LTC2482’s autocalibration circuits further simplify the
antialiasing requirements by additional normal mode
signal ltering both in the analog and digital domain.
Independent of the operating mode, fS = 256 fN = 2048
fOUTMAX where fN is the notch frequency and fOUTMAX
is the maximum output data rate. In the internal oscilla-
tor mode with 50Hz/60Hz rejection, fS = 13960Hz. In the
external oscillator mode, fS = fEOSC/20.
The regions of low rejection occurring at integer multiples
of fS have a very narrow bandwidth. Magnied details of
the normal mode rejection curves are shown in Figure 27
(rejection near DC) and Figure 28 (rejection at fS = 256fN)
where fN represents the notch frequency. These curves
have been derived for the external oscillator mode but
they can be used in all operating modes by appropriately
selecting the fN value.
The user can expect to achieve this level of performance
using the internal oscillator as it is demonstrated by
Figure 29. Typical measured values of the normal mode
rejection of the LTC2482 operating with an internal oscil-
lator (50Hz/60Hz rejection) is shown in Figure 29.
As a result of these remarkable normal mode specica-
tions, minimal (if any) antialias ltering is required in front
of the LTC2482. If passive RC components are placed in
front of the LTC2482, the input dynamic current should
be considered (see Input Current section). In this case,
the differential input current cancellation feature of the
LTC2482 allows external RC networks without signicant
degradation in DC performance.
Traditional high order delta-sigma modulators, while
providing very good linearity and resolution, suffer
from potential instabilities at large input signal levels.
The proprietary architecture used for the LTC2482 third
INPUT SIGNAL FREQUENCY (Hz)
INPUT
NORMAL
MODE
REJECTION
(dB)
2482 F27
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
fN
0
2fN 3fN 4fN 5fN 6fN 7fN 8fN
fN = fEOSC/5120
INPUT SIGNAL FREQUENCY (Hz)
250fN 252fN 254fN 256fN 258fN 260fN 262fN
INPUT
NORMAL
MODE
REJECTION
(dB)
2482 F28
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
Figure 27. Input Normal Mode Rejection at DC
Figure 28. Input Normal Mode Rejection at fS = 256fN
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