the output of the reference is available at VREF (P" />
參數(shù)資料
型號(hào)： DC682A
廠商： Linear Technology
文件頁(yè)數(shù)： 4/20頁(yè)
文件大小： 0K
描述： BOARD SAR ADC LTC1859
軟件下載： QuikEval System
設(shè)計(jì)資源： DC682A Design File
DC682A Schematic
標(biāo)準(zhǔn)包裝： 1
系列： QuikEval™, SoftSpan™
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 100k
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
工作溫度： 0°C ~ 70°C
已用 IC / 零件： LTC1859
已供物品： 板
相關(guān)產(chǎn)品： LTC1859CG#PBF-ND - IC ADC 8CH 16BIT 100KSPS 28-SSOP
LTC1859IG#PBF-ND - IC A/D CONV 8CH 16BIT 28-SSOP
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LTC1859CG#TRPBF-ND - IC A/D CONV 8CH 16BIT 28-SSOP
LTC1857/LTC1858/LTC1859
12
185789fa
the output of the reference is available at VREF (Pin 15).
The internal reference can be overdriven with an external
reference if more accuracy is needed. The buffer output
drives the internal DAC and is available at REFCOMP (Pin
16). The REFCOMP pin can be used to drive a steady DC
load of less than 2mA. Driving an AC load is not recom-
mended because it can cause the performance of the
converter to degrade.
between successive integer LSB values (i.e., 0.5LSB,
1.5LSB, 2.5LSB, … FS – 1.5LSB). The output code is
natural binary with 1LSB = FS/65536. Figure 4b shows
the input/output transfer characteristics for the bipolar
mode in two’s complement format.
FULL SCALE AND OFFSET
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero during a
calibration sequence. Offset error must be adjusted before
full-scale error. Zero offset is achieved by adjusting the
offset applied to the “–” input. For single-ended inputs, this
offset should be applied to the COM pin. For differential
inputs, the “–” input is dictated by the MUX address. For
unipolar zero offset error, apply 0.5LSB (actual voltage will
vary with input span selected) to the “+” input and adjust
the offset at the “–” input until the output code ickers
between 0000 0000 0000 0000 and 0000 0000 0000 0001
for the LTC1859, between 00 0000 0000 0000 and 00 0000
0000 0001 for the LTC1858 and between 0000 0000 0000
and 0000 0000 0001 for the LTC1857.
For bipolar zero error, apply – 0.5LSB (actual voltage will
vary with input span selected) to the “+” input and adjust
the offset at the “–” input until the output code ickers
between 0000 0000 0000 0000 and 1111 1111 1111
1111 for the LTC1859, between 00 0000 0000 0000 and
Figure 3. Internal or External Reference Source
2.5V
REFERENCE
1859 F03
12-/14-/16-BIT
CAPACITIVE DAC
1.6384X BUFFER
8k
VREF
1μF
15
2.5V
16 REFCOMP
0.1μF
4.096V
10μF
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
FS – 1LSB
1859 F4a
111...111
111...110
111...101
111...100
000...000
000...001
000...010
000...011
1
LSB
UNIPOLAR
ZERO
1LSB =
FS
65536
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
–1
LSB
1859 F4b
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FS/2 – 1LSB
–FS/2
1LSB =
FS
65536
Figure 4a. Unipolar Transfer Characteristics (UNI = 1)
Figure 4b. Bipolar Transfer Characteristics (UNI = 0)
For minimum code transition noise the VREF pin and the
REFCOMPpinshouldeachbedecoupledwithacapacitorto
lter wideband noise from the reference and the buffer.
UNIPOLAR / BIPOLAR OPERATION
Figure 4a shows the ideal input/output characteristics
for the LTC1859. The code transitions occur midway
APPLICATIONS INFORMATION
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