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參數(shù)資料
| 型號： | DC1255A-A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 0K |
| 描述： | BOARD SAR ADC LTC1605 |
| 軟件下載： | QuikEval II System |
| 設(shè)計資源： | DC1255A Design Files DC1255A Schematic |
| 標準包裝： | 1 |
| 系列： | QuikEval-II™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 100k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 輸入范圍： | ±10 V |
| 已用 IC / 零件： | LTC1605 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC1605-2IG#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28SSOP LTC1605-1IG#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28SSOP LTC1605-2CN#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28-DIP LTC1605-1CN#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28-DIP LTC1605-1IN#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28-DIP LTC1605-2IN#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28-DIP LTC1605CG#PBF-ND - IC A/D CONV 16BIT SAMPLNG 28SSOP LTC1605AISW#TRPBF-ND - IC A/D CONV 16BIT SAMPLNG 28SOIC LTC1605ISW#TRPBF-ND - IC A/D CONV 16BIT SAMPLNG 28SOIC LTC1605-2CG#TRPBF-ND - IC A/D CONV 16BIT SAMPLNG 28SSOP 更多... |
7
1605fc
LTC1605
PIN FUNCTIONS
UU
U
on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on
Pin 6 and the LSB is output on Pin 13.
R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.
CS (Pin 25): Chip Select. Internally OR’d with R/C. With
R/C low, a falling edge on CS will initiate a conversion.
With R/C high, a falling edge on CS will enable the output
data.
BUSY (Pin 26): Output Shows Converter Status. It is low
when a conversion is in progress. Data valid on the rising
edge of BUSY. CS or R/C must be high when BUSY rises
or another conversion will start without time for signal
acquisition.
VANA (Pin 27): 5V Analog Supply. Bypass to ground with
a 0.1
F ceramic and a 10F tantalum capacitor.
VDIG (Pin 28): 5V Digital Supply. Connect directly to Pin
27.
TEST CIRCUITS
Load Circuit for Access Timing
1k
CL
DBN
1k
5V
LTC1605 TC01
A. HI-Z TO VOH AND VOL TO VOH
B. HI-Z TO VOL AND VOH TO VOL
Load Circuit for Output Float Delay
1k
50pF
DBN
1k
5V
LTC1605 TC02
A. VOH TO HI-Z
B. VOL TO HI-Z
FUNCTIONAL BLOCK DIAGRA
UU
W
16-BIT CAPACITIVE DAC
COMP
REF BUF
2.5V REF
CAP
(2.5V)
CSAMPLE
D15
D0
BUSY
CONTROL LOGIC
R/C
BYTE
INTERNAL
CLOCK
CS
ZEROING SWITCHES
VDIG
VANA
VIN
REF
AGND1
AGND2
DGND
16
LTC1605 BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
4k
20k
4k
10k
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