型號(hào) 廠商 描述
m27c512-12xn3tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-12xn3x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 2.2pF; Working Voltage (Vdc)[max]: 200V; Capacitance Tolerance: +/-0.5pF; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.063"; Container: Bulk; Features: Unmarked
m27c512-12xn6
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit (64K x8) UV EPROM and OTP EPROM
m27c512-12xn6e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-12xn6f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-12xn6tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-12xn6x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit (64K x8) UV EPROM and OTP EPROM
m27c512-15b1e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b1f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b1tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 CAP 24PF 50V 5% NP0(C0G) SMD-1206 TR-7-PL SN-NIBAR
m27c512-15b1x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b3
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit (64K x8) UV EPROM and OTP EPROM
m27c512-15b3e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b3f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b3tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b3x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b6
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit (64K x8) UV EPROM and OTP EPROM
m27c512-15b6e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b6f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b6tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15b6x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit (64K x8) UV EPROM and OTP EPROM
m27c512-15c1e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c1f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c1tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c1x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c3
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit (64K x8) UV EPROM and OTP EPROM
m27c512-15c3e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c3f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c3tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15c3x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xc3tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xc3x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xc6tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xc6x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 270pF; Working Voltage (Vdc)[max]: 200V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.063"; Container: Bulk; Features: Unmarked
m27c512-15xf1tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf1x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf3tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf3x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf6e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf6f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf6tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-15xf6x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-20c6tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-20c6x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-20f1e
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-20f1f
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-20f1tr
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
m27c512-20f1x
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
意法半導(dǎo)體 Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 2.7pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-0.5pF; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.063"; Container: Bulk; Features: Unmarked