| 型號(hào) |
廠商 |
描述 |
5962-87549012x
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8754901cx
|
|
27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Serializer |
5962-8754901dx
|
|
27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Serializer |
5962-87549022x
|
|
Quad 2-input NAND Gate |
5962-8754902ex
|
|
Quad 2-input NAND Gate |
5962-8754902fx
|
|
Quad 2-input NAND Gate |
5962-87550012a
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-87550012x
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8755001ra
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8755001rx
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8755001sa
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8755001sx
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8755001vxa
|
|
Programmable DC-Balance 21-Bit Deserializers |
5962-8755401m2a
|
|
Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs |
5962-8755401mea
|
|
Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs |
5962-8755401mfa
|
|
Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs |
5962-8755402m2x
|
|
Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs |
5962-8755402mex
|
|
LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver |
5962-87555012a
|
|
LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver |
5962-8755501ra
|
|
8-Bit D-Type Latch |
5962-8755501sa
|
|
1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver |
5962-8755501sc
|
|
LVTTL/TTL/CMOS-to-Differential LVECL/ECL Translators |
5962-8755501vsa
|
|
Evaluation Kit for the MAX9360, MAX9361 |
5962-8755501vsc
|
|
LVTTL/TTL/CMOS-to-Differential LVECL/ECL Translators |
5962-8755502la
|
|
Differential LVPECL-to-LVDS Translators |
5962-87556012x
|
|
Differential LVPECL-to-LVDS Translators |
5962-8755601rx
|
|
Single-Ended-to-Differential LVECL/LVPECL 2:1 Multiplexer |
5962-8755601sx
|
|
Single-Ended-to-Differential LVECL/LVPECL 2:1 Multiplexer |
5962-8755602lx
|
|
Evaluation Kit for the MAX9382, MAX9383 |
5962-87557012a
|
|
NOR and OR/NOR Gate |
5962-8755701ea
|
|
Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
5962-8755701fa
|
|
NOR and OR/NOR Gate |
5962-8755701xa
|
|
Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
5962-87558012a
|
|
Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
5962-87558012c
|
|
Quad 2-input Exclusive OR (XOR) Gate |
5962-87558012x
|
|
Quad 2-input Exclusive OR (XOR) Gate |
5962-8755801ea
|
|
Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers |
5962-8755801ex
|
|
Quad 2-input Exclusive OR (XOR) Gate |
5962-8755801fa
|
|
Quad 2-input Exclusive OR (XOR) Gate |
5962-8755801fx
|
|
Differential 8:1 ECL/PECL Multiplexer with Dual Output Buffers |
5962-87559012a
|
|
OR-AND Gate |
5962-87559012x
|
|
OR-AND Gate |
5962-8755901ea
|
|
OR-AND Gate |
5962-8755901ex
|
|
Anything-to-LVDS Dual 2 x 2 Crosspoint Switches |
5962-8757002qa
|
|
Triple-Channel HDTV Filters |
5962-8757101xa
|
|
Triple-Channel HDTV Filters |
5962-8757101ya
|
|
Evaluation Kit for the MAX9501 |
5962-8757102vxa
|
|
Evaluation Kit for the MAX9503G, MAX9503M, MAX9505 |
5962-8757102vya
|
|
DirectDrive Video Amplifier with Reconstruction Filter and Analog Switch |
5962-8757102xa
|
|
Evaluation Kit/Evaluation System for the MAX9507 |