參數(shù)資料
型號： DAC8820IBDBG4
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： PARALLEL, WORD INPUT LOADING, 0.5 us SETTLING TIME, 16-BIT DAC, PDSO28
封裝： GREEN, PLASTIC, SSOP-28
文件頁數(shù)： 17/22頁
文件大?。?/td> 1216K
代理商： DAC8820IBDBG4
www.ti.com
PIN ASSIGNMENTS
REF
R
COM
R1
R
OFS
R
FB
I
OUT
AGND
LDAC
WR
D15
D14
D13
D12
D11
RST
D0
D1
D2
D3
V
DD
DGND
D4
D5
D6
D7
D8
D9
D10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DAC8820
SBAS358D – AUGUST 2005 – REVISED FEBRUARY 2008
ELECTRICAL CHARACTERISTICS (continued)
All specifications at –40
°C to +85C, V
DD = +2.7 V to +5.5 V, IOUT = virtual GND, GND = 0 V, VREF = 10 V, and TA = full
operating temperature, unless otherwise noted.
DAC8820
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
VDD
2.7
5.5
V
IDD (normal operation)
Logic inputs = 0 V
5
A
VDD = +4.5 V to +5.5 V
VIH = VDD and VIL = GND
3
5
A
VDD = +2.7 V to +3.6 V
VIH = VDD and VIL = GND
1
2.5
A
AC CHARACTERISTICS(2)
Output current settling time
0.5
s
Reference multiplying BW
VREF = 5 VPP, Data = FFFFh
8
MHz
VREF = 0 V to 10 V,
DAC glitch impulse
2
nV–s
Data = 7FFFh to 8000h to 7FFFh
Feedthrough error VOUT/VREF
Data = 0000h, VREF = 10 kHz, ±10 VPP
–70
dB
LDAC = Logic low, VREF = –10 V to + 10 V
Digital feedthrough
1
nV–s
Any code change
Total harmonic distortion
VREF = 6 VRMS, Data = FFFFh, f = 1 kHz
–105
dB
Output spot noise voltage
10
nV/
√Hz
(2)
Specified by design and characterization; not production tested.
TERMINAL FUNCTIONS
PIN #
NAME
DESCRIPTION
Reference input and 4-quadrant resistor
1
REF
(R2).
Center tap of two 4-quadrant resistors
2
RCOM
(R1 and R2).
3
R1
4-quadrant resistor (R1).
4
ROFS
Bipolar offset resistor
5
RFB
Internal matching feedback resistor
6
IOUT
DAC current output
7
AGND
Analog ground
Digital input load DAC control. When
LDAC is high, data is loaded from input
8
LDAC
register into a DAC register, updating the
DAC output.
Write control digital input. Active low.
When WR is taken to logic low, data is
9
WR
loaded from the digital input pins (D0–D15)
into a16-bit input register.
10–21
D15–D4
Digital input data bits. D15 is MSB.
22
DGND
Digital ground
23
VDD
Positive power supply
24–27
D3–D0
Digital Input data bits. D0 is LSB.
Reset. Active low. When RST is taken to
logic low, the DAC register is set to zero
28
RST
code, resulting in the DAC output being
set to 0 V.
4
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): DAC8820
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