參數(shù)資料
型號(hào): DAC8531EVM
廠商: Texas Instruments, Inc.
英文描述: DAC8531 Evaluation Module(DAC8531評(píng)估板)
中文描述: DAC8531評(píng)估模塊(DAC8531評(píng)估板)
文件頁(yè)數(shù): 34/42頁(yè)
文件大?。?/td> 788K
代理商: DAC8531EVM
I/O Signal Mapping
3-12
Table 3
7. Jumper Setting Function (Continued)
Reference
Jumper
Setting
Function
Disconnects V
REF
from the negative input terminal of U12.
W10
Allows V
REF
to be routed to the negative input terminal of U12 for bipolar operation.
Disconnect the negative terminal of U12 to AGND.
W11
Allow a 2
×
gain output in unipolar mode.
Disconnects 12-V supply to U15 or R22 and R23 voltage divider circuit.
W12
Connects 12-V supply to U15 or R22 and R23 voltage divider circuit.
2
6
1
5
3
4
Routes the raw output of the DAC8531 to the TP1 test point, J3-1, and J11 output
terminals.
W13
2
6
1
5
3
4
Routes the output of U12 to the TP1 test point, J3-1 and J11 output terminals. Used
for unipolar and bipolar modes of operation.
2
6
1
5
3
4
Routes the output of U12 to the TP1 test point, J3-1 and J11 output terminals. Used
for capacitive load driving.
1
3
Routes the adjustable onboard reference voltage to the DAC8531 V
REF
pin.
W14
1
3
Routes the adjustable user supplied reference voltage to the DAC8531 V
REF
pin.
Legend:
Indicates the corresponding pins that are shorted or closed.
3.4
I/O Signal Mapping
Figure 3
9 and Figure 3
10 shows the I/O signals with respect to their
connectors/headers.
3.4.1
Daughterboard Connector Signal Mapping
Figure 3
9 describes the essential signals from the DSK boards that are
brought out through the common connectors which mates with the
daughterboard connectors J6 and J7.
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