參數(shù)資料
型號(hào): DAC8408FPC
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/16頁(yè)
文件大?。?/td> 0K
描述: IC DAC 8BIT QUAD W/MEMORY 28PLCC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 39
設(shè)置時(shí)間: 190ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 管件
輸出數(shù)目和類型: 4 電流,單極;4 電流,雙極
采樣率(每秒): 5.26M
DAC8408
–10–
REV. A
BASIC APPLICATIONS
Some basic circuit configurations are shown in Figures 6 and 7.
Figure 6 shows the DAC8408 connected in a unipolar configu-
ration (2-Quadrant Multiplication), and Table I shows the Code
Table. Resistors R1, R2, R3, and R4 are used to trim full scale
output. Full-scale output voltage = VREF –1 LSB = VREF (1–2
–8)
or VREF × (255/256) with all digital inputs high. Low tempera-
ture coefficient (approximately 50 ppm/
°C) resistors or trim-
mers should be selected if used. Full scale can also be adjusted
using VREF voltage. This will eliminate resistors R1, R2, R3, and
R4. In many applications, R1 through R4 are not required, and
the maximum gain error will then be that of the DAC.
Each DAC exhibits a variable output resistance that is code-
dependent. This produces a code-dependent, differential non-
linearity term at the amplifier’s output which can have a maxi-
mum value of 0.67
× the amplifier’s offset voltage. This differ-
ential nonlinearity term adds to the R-2R resistor ladder differ-
ential-nonlinearity; the output may no longer be monotonic. To
maintain monotonicity and minimize gain and linearity errors, it
is recommended that the op amp offset voltage be adjusted to
less than 10% of 1 LSB (1 LSB = 2
–8
× V
REF or 1/256
× V
REF),
or less than 3.9 mV over the operating temperature range. Zero-
scale output voltage (with all digital inputs low) may be adjusted
using the op amp offset adjustment. Capacitors C1, C2, C3,
and C4 provide phase compensation and help prevent overshoot
and ringing when using high speed op amps.
Figure 7 shows the recommended circuit configuration for the
bipolar operation (4-quadrant multiplication), and Table II shows
the Code Table. Trimmer resistors R17, R18, R19, and R20
are used only if gain error adjustments are required and range
between 50
and 1000 . Resistors R21, R22, R23, and R24
will range betwen 50
and 500 . If these resistors are used, it
is essential that resistor pairs R9–R13, R10–R14, R11–R15,
R12–R16 are matched both in value and tempco. They should
be within 0.01%; wire wound or metal foil types are preferred
for best temperature coefficient matching. The circuits of Figure
6 and 7 can either be used as a fixed reference D/A converter, or
as an attenuator with an ac input voltage.
Table I. Unipolar Binary Code Table (Refer to Figure 6)
DAC Data Input
MSB
LSB
Analog Output
1 1 1 1 1 1 1 1
–VREF
255
256
1 0 0 0 0 0 0 1
–VREF
129
256
1 0 0 0 0 0 0 0
–VREF
128
256
=
–VIN
2
0 1 1 1 1 1 1 1
–VREF
127
256
0 0 0 0 0 0 0 1
–VREF
1
256
0 0 0 0 0 0 0 0
–VREF
0
256
= 0
NOTE
1 LSB = (2
–8) (V
REF) =
1
256
(VREF)
Figure 6. Quad DAC Unipolar Operation (2-Quadrant Multiplication)
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