- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8881 > DAC8248GPZ (Analog Devices Inc)IC DAC 12BIT DUAL W/BUFF 24DIP PDF資料下載
參數(shù)資料
| 型號： | DAC8248GPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT DUAL W/BUFF 24DIP |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 15 |
| 設置時間： | 1µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 50µW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 24-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 1M |
DAC8248
–12–
REV. B
INTERFACE CONTROL LOGIC PIN FUNCTIONS
LSB
/MSB – (PIN 17) LEAST SIGNIFICANT BIT (Active
Low)/ MOST SIGNIFICANT BIT (Active High). Selects
lower 8-bits (LSBs) or upper 4-bits (MSBs); either can be
loaded first. It is used with the WR signal to load data into the
input registers. Data is loaded in a right justified format.
DAC A
/DAC B – (PIN 18) DAC SELECTION. Active low
for DAC A and Active High for DAC B.
WR
– (PIN 20) WRITE – Active Low. Used with the LSB/
MSB signal to load data into the input registers, or Active High
to latch data into the input registers.
LDAC
– (PIN 19) LOAD DAC. Used to transfer data sim-
ultaneously from DAC A and DAC B input registers to both
DAC output registers. The DAC register becomes transparent
(activity on the digital inputs appear at the analog output) when
both WR and LDAC are low. Data is latched into the output
registers on the rising edge of LDAC.
RESET
– (PIN 16) – Active Low. Functions as a zero over-
ride; all registers are forced to zero when the RESET signal is
low. All registers are latched to zeros when the write signal is
high and RESET goes high.
APPLICATIONS INFORMATION
UNIPOLAR OPERATION
Figure 7 shows a simple unipolar (2-quadrant multiplication)
circuit using the DAC8248 and OP270 dual op amp (use two
OP42s for applications requiring higher speeds), and Table I
shows the corresponding code table. Resistors R1, R2, and R3,
R4 are used only if full-scale gain adjustments are required.
Table I. Unipolar Binary Code Table (Refer to Figure 7)
Binary Number in
DAC Register
Analog Output, VOUT
MSB
LSB
(DAC A or DAC B)
1111 1111 1111
–VREF
4095
4096
1000 0000 0000
–VREF
2048
4096
= –
1
2
VREF
0000 0000 0001
–VREF
1
4096
0000 0000 0000
0 V
NOTE
1 LSB = (2
-12) (V
REF)=
1
4096
(VREF)
Figure 7. Unipolar Configuration (2-Ouadrant Multiplication)
Low temperature-coefficient (approximately 50 ppm/
°C) resis-
tors or trimmers should be used. Maximum full-scale error
without these resistors for the top grade device and VREF =
±10 V is 0.024%, and 0.049% for the low grade. Capacitors C1
and C2 provide phase compensation to reduce overshoot and
ringing when high-speed op amps are used.
Full-scale adjustment is achieved by loading the appropriate
DAC’s digital inputs with 1111 1111 1111 and adjusting R1 (or
R3 for DAC B) so that:
VOUT = VREF ×
4095
4096
Full-scale can also be adjusted by varying VREF voltage and
eliminating R1, R2, R3, and R4. Zero adjustment is performed by
相關PDF資料 |
PDF描述 |
|---|---|
| VI-2W3-MW-F1 | CONVERTER MOD DC/DC 24V 100W |
| VI-2W2-MW-F4 | CONVERTER MOD DC/DC 15V 100W |
| VI-2W2-MW-F3 | CONVERTER MOD DC/DC 15V 100W |
| MS3100R40-56P | CONN RCPT 85POS WALL MNT W/PINS |
| MS3454W28-9P | CONN RCPT 12POS JAM NUT W/PINS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DAC8248HP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DAC8248HS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 12-Bit 8-Bit Byte Double-Buffered CMOS D/A Converter |
| DAC8308 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Converter IC |
| DAC8311 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1.8V to 5.5V, 80mA, 14- and 16-Bit, Low-Power, Single-Channel,DIGITAL-TO-ANALOG CONVERTERS in SC70 Package |
| DAC8311_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1.8V to 5.5V, 80mA, 14- and 16-Bit, Low-Power, Single-Channel,DIGITAL-TO-ANALOG CONVERTERS in SC70 Package |
發(fā)布緊急采購，3分鐘左右您將得到回復。