ELECTRICAL CHARACTERISTICS (@ V DD
參數(shù)資料
型號(hào)： DAC8222GPZ
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 8/15頁(yè)
文件大小： 0K
描述： IC DAC 12BIT DUAL W/BUFF 24DIP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 15
設(shè)置時(shí)間： 1µs
位數(shù)： 12
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 通孔
封裝/外殼： 24-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 24-PDIP
包裝： 管件
輸出數(shù)目和類(lèi)型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 1M
REV. C
–2–
DAC8222–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V
DD = +5 V or +15 V, VREF A = VREF B = +10 V, VOUT A = VOUT B = 0 V; AGND = DGND = 0 V;
TA = Full Temperature Range Specified in Absolute Maximum Ratings; unless otherwise noted. Specifications apply for DAC A and DAC B.)
Parameter
Symbol Conditions
Min
Typ
Max
Units
STATIC ACCURACY
Resolution
N
12
Bits
Relative Accuracy
INL
Endpoint Linearity Error
DAC8222A/E/G
±1/2
LSB
DAC8222F/H
±1
LSB
Differential Nonlinearity
DNL
All Grades are Guaranteed Monotonic
±1
LSB
Full-Scale Gain Error
1
GFSE
DAC8222A/E
±1
LSB
DAC8222G
±2
LSB
DAC8222F/H
±4
LSB
Gain Temperature Coefficient
Gain/Temperature
TCGFS
(Notes 2, 7)
±2
±5
ppm/
°C
Output Leakage Current
IOUT A (Pin 2),
ILKG
All Digital Inputs =
TA = +25
°C
±5
±10
nA
IOUT B (Pin 24)
0000 0000 0000
TA = Full Temp. Range
±50
nA
Input Resistance
(VREF A, VREF B)RREF
(Note 9)
8
11
15
k
Input Resistance Match
R
REF
±0.2
±1%
RREF
DIGITAL INPUTS
Digital Input High
VINH
VDD = +5 V
2.4
V
VDD = +15 V
13.5
V
Digital Input Low
VINL
VDD = +5 V
0.8
V
VDD = +15 V
1.5
V
Input Current
IIN
VIN = 0 V or VDD
TA = +25
°C
±0.001
±1
A
and VINL or VINH
TA = Full Temp. Range
±10
A
Input Capacitance
2
CIN
DB0–DB11
10
pF
WR, LDAC, DAC A/DAC B
15
pF
POWER SUPPLY
Supply Current
IDD
All Digital Inputs VINL or VINH
2mA
All Digital Inputs 0 V or VDD
10
100
A
DC Power Supply
Rejection Ratio
PSRR
V
DD =
±5%
0.002
%/%
(
Gain/V
DD)
AC PERFORMANCE CHARACTERISTICS
2
Propagation Delay
4, 5
tPD
TA = +25
°C
350
ns
Current Settling Time
5, 6
tS
TA = +25
°C1
s
Output Capacitance
CO
Digital Inputs = All 0s
90
pF
COUT A, COUT B
90
pF
Digital Inputs = All 1s
120
pF
COUT A, COUT B
120
pF
AC Feedthrough at
FTA
VREF A to IOUT A; VREF A = 20 V p-p;
–70
dB
IOUT A or IOUT B
f = 100 kHz; TA = +25
°C
–70
dB
VREF B to IOUT B; VREF B = 20 V p-p;
–70
dB
FTB
f = 100 kHz; TA = +25
°C
–70
dB
SWITCHING CHARACTERISTICS
2, 3
VDD = +5 V
VDD = +15 V
+25
°C–40°C to +85°C8 –55°C to +125°C
All Temps
10
DAC Select to
tAS
150
180
210
60
ns min
Write Set-Up Time
DAC Select to
tAH
0
ns min
Write Hold Time
LDAC to
tLS
80
100
120
60
ns min
Write Set-Up Time
LDAC to
tLH
20
ns min
Write Hold Time
Data Valid to
tDS
220
240
260
100
ns min
Write Set-Up Time
Data Valid to
tDH
00
0
10
ns min
Write Hold Time
Write Pulse Width
tWR
130
160
170
90
ns min
LDAC Pulse Width
tLWD
100
120
130
60
ns min
NOTES
11Measured using internal R
FB A and RFB B. Both DAC digital inputs = 1111 1111 1111.
12Guaranteed and not tested.
13See timing diagram.
14From 50% of digital input to 90% of final analog output current.
VREF A = VREF B = +10 V; OUT A, OUT B load = 100
, C
EXT = 13 pF.
15
WR, LDAC = 0 V; DB0–DB11 = 0 V to V
DD or VDD to 0 V.
16Settling time is measured from 50% of the digital input change to where the
output voltage settles within 1/2 LSB of full scale.
17Gain TC is measured from +25
°C to T
MIN or from +25
°C to T
MAX.
18 These limits apply for the commercial and industrial grade products.
19 Absolute temperature coefficient is approximately +50 ppm/
°C.
10 These limits also apply as typical values for V
DD = +12 V with +5 V CMOS
logic levels and TA = +25
°C.
Specifications subject to change without notice.
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