參數資料
型號: DAC7625PB
英文描述: 12-Bit Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER
中文描述: 12位四路電壓輸出數字模擬轉換器
文件頁數: 2/11頁
文件大?。?/td> 311K
代理商: DAC7625PB
2
DAC7624/7625
SPECIFICATION
At T
A
= –40
°
C to +85
°
C, V
DD
= +5V, V
SS
= –5V, V
REFH
= +2.5V, V
REFL
= –2.5V, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
DAC7624P, U
DAC7625P, U
DAC7624PB, UB
DAC7625PB, UB
NOTES: (1) If V
= 0V, specification applies at code 00A
and above. (2) LSB means Least Significant Bit, when V
equals +2.5V and V
equals –2.5V,
then one LSB equals 1.22mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale
error. (5) If V
SS
= –5V, full-scale 5V step. If V
SS
= 0V, full-scale positive 2.5V step and negative step from code FFF
H
to 00A
H
.
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
(1)
Linearity Matching
(3)
Differential Linearity Error
Monotonicity
Zero-Scale Error
Zero-Scale Drift
Zero-Scale Matching
(3)
Full-Scale Error
Full-Scale Matching
(3)
Zero-Scale Error
Zero-Scale Drift
Zero-Scale Matching
(3)
Full-Scale Error
Full-Scale Matching
(3)
Power Supply Rejection
V
SS
= 0V or –5V
V
SS
= 0V or –5V
V
SS
= 0V or –5V
T
MIN
to T
MAX
Code = 000
H
±
2
±
2
±
1
±
1
±
1
±
1
LSB
(2)
LSB
LSB
Bits
LSB
ppm/
°
C
LSB
LS
LSB
LSB
ppm/
°
C
LSB
LSB
LSB
ppm/V
12
6
±
4
5
±
2
±
4
±
2
±
8
10
±
4
±
8
±
4
6
6
±
1
6
±
1
6
6
±
2
6
±
2
2
6
Code = FFF
H
Code = 00A
H
, V
SS
= 0V
V
SS
= 0V
V
SS
= 0V
Code = FFF
H
, V
SS
= 0V
V
SS
= 0V
5
6
30
6
ANALOG OUTPUT
Voltage Output
(4)
V
REFL
= 0V, V
SS
= 0V
V
SS
= –5V
0
V
REFH
V
REFH
+1.25
6
6
6
6
6
6
V
V
V
REFL
–1.25
Output Current
Load Capacitance
Short-Circuit Current
Short-Circuit Duration
mA
pF
mA
No Oscillation
100
6
6
6
+5, –120
Momentary
REFERENCE INPUT
V
REFH
Input Range
V
REFL
Input Range
V
REFL
Input Range
V
SS
= 0V or –5V
V
SS
= 0V
V
SS
= –5V
V
REFL
+1.25
0
–2.5
+2.5
6
6
6
6
6
6
V
V
V
V
REFH
–1.25
V
REFH
–1.25
DYNAMIC PERFORMANCE
Settling Time
(5)
Channel-to-Channel Crosstalk
To
±
0.012%
Full-Scale Step
On any other DAC
0Hz to 1MHz
5
10
6
6
6
μ
s
LSB
0.25
Output Noise Voltage
40
6
nV/
Hz
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels
V
IH
V
IL
V
OH
V
OL
Data Format
TTL-Compatible CMOS
6
I
IH
±
10
μ
A
I
IL
±
10
μ
A
I
OH
= –0.8mA
I
OL
= 1.6mA
2.4
–0.3
3.6
0.0
V
DD
+0.3
0.8
V
DD
0.4
6
6
6
6
6
6
6
6
V
V
V
V
Straight Binary
6
POWER SUPPLY REQUIREMENTS
V
DD
V
SS
I
DD
I
SS
Power Dissipation
4.75
–5.25
5.25
–4.75
1.9
6
6
6
6
6
V
V
If V
SS
0V
1.5
–1.6
15
7.5
6
6
6
6
mA
mA
mW
mW
–2.1
6
V
SS
= –5V
V
SS
= 0V
20
10
6
6
TEMPERATURE RANGE
Specified Performance
DAC7624P, U, PB, UB
DAC7625P, U, PB, UB
–40
+85
6
6
°
C
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