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參數(shù)資料
| 型號： | D2-24044-MR |
| 廠商： | Intersil |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL AMP AUDIO PWR D 38HTSSOP |
| 標準包裝： | 50 |
| 系列： | D2Audio™ |
| 類型： | D 類 |
| 輸出類型： | 2-通道（立體聲）或 4 通道（四路） |
| 在某負載時最大輸出功率 x 通道數(shù)量： | 30W x 2 @ 8 歐姆 |
| 電源電壓： | 9 V ~ 26 V |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 38-HTSSOP |
| 封裝/外殼： | 38-TFSOP （0.173"，4.40mm 寬）裸露焊盤 |
| 包裝： | 管件 |
7
FN7678.0
September 3, 2010
13
PWM7
I
3.3
PWM Input. Routes to output channel, dependent on output configuration settings.
14
PWM8
I
3.3
PWM Input. Routes to output channel, dependent on output configuration settings.
15
PWMGND2
GND
0
Low-voltage ground. Connects to ground of circuitry providing PWM inputs. Both
PWMGND and PWMGND2 are to tie together to the same ground.
16
nERRORA
O
3.3
Overcurrent protection output, channel A output stage. Open drain, 16mA drive strength
output with pull-up. Pulls low when active from overcurrent detection of output stage.
17
nERRORB
O
3.3
Overcurrent protection output, channel B output stage. Open drain, 16mA drive strength
output with pull-up. Pulls low when active from overcurrent detection of output stage.
18
nERRORC
O
3.3
Overcurrent protection output, channel C output stage. Open drain, 16mA drive strength
output with pull-up. Pulls low when active from overcurrent detection of output stage.
19
nERRORD
O
3.3
Overcurrent protection output, channel D output stage. Open drain, 16mA drive strength
output with pull-up. Pulls low when active from overcurrent detection of output stage.
20
HVDDD
P
HV
Output stage D high voltage supply power. A separate power pin connection is provided
for each of the output stages. All of the HVDD[A:D] pins and the VDDHV pin connect to
the system “HV” power source.
21
HGNDD
GND
HV
Output stage D high voltage supply ground. A separate ground pin connection is provided
for each of the output stages. All of the HGND[A:D] pins connect to system “HV” power
ground (also see Note 8).
22
OUTD
O
HV
PWM power amplifier output, channel D.
23
HSBSD
I
HV
High side boot strap input, output channel D. Capacitor couples to OUTD amplifier output.
24
HSBSC
I
HV
High side boot strap input, output channel C. Capacitor couples to OUTC amplifier output.
25
OUTC
O
HV
PWM power amplifier output, channel C.
26
HGNDC
GND
HV
Output stage C high voltage supply ground. A separate ground pin connection is provided
for each of the output stages. All of the HGND[A:D] pins connect to system “HV” power
ground (also see Note 8).
27
HVDDC
P
HV
Output stage C high voltage supply power. A separate power pin connection is provided
for each of the output stages. All of the HVDD[A:D] pins and the VDDHV pin connect to
the system “HV” power source.
28
IREF
I
-
Overcurrent reference analog input. Used in setting the overcurrent error detect
externally-set threshold. The pin needs to be connected to a 100kΩ resistor to ground to
set the overcurrent threshold according to the specified limits.
29
VDDHV
P
+HV
High Voltage internal driver supply power. All of the HVDD[A:D] pins and the VDDHV pin
connect to the system “HV” power source. The internal +5V supply regulators also
operate from this VDDHV input.
30
REG5V
P
5
5V internal regulator filter connect. A +5V supply is internally generated from the voltage
source provided at the VDDHV pin. REG5V is used for external connection of a decoupling
capacitor.
31
HVDDB
P
HV
Output stage B high voltage supply power. A separate power pin connection is provided
for each of the output stages. All of the HVDD[A:D] pins and the VDDHV pin connect to
the system “HV” power source.
32
HGNDB
GND
HV
Output stage B high voltage supply ground. A separate ground pin connection is provided
for each of the output stages. All of the HGND[A:D] pins connect to system “HV” power
ground (also see Note 8).
33
OUTB
O
HV
PWM power amplifier output, channel B.
34
HSBSB
I
HV
High side boot strap input, output channel B. Capacitor couples to OUTB amplifier output.
35
HSBSA
I
HV
High side boot strap input, output channel A. Capacitor couples to OUTA amplifier output.
36
OUTA
O
HV
PWM power amplifier output, channel A.
Pin Description (Continued)
PIN
PIN NAME
(Note 7)
TYPE
VOLTAGE
LEVEL
(V)
DESCRIPTION
D2-24044
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| D2-24044-MR-T | 功能描述:音頻放大器 LW-PWR CLASS-AMPLIFI 3 8LD HTSSOP 4 4X9 7 RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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