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參數(shù)資料
| 型號： | CY7C149 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 1Kx4 Static RAM(1Kx4 靜態(tài) RAM) |
| 中文描述： | 1Kx4靜態(tài)RAM（1Kx4靜態(tài)RAM）的 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 159K |
| 代理商： | CY7C149 |
1Kx4 Static RAM
CY7C148
CY7C149
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
November 1989 - Revised November 1993
Features
Automatic power-down when deselected (7C148)
CMOS for optimum speed/power
25-ns access time
Low active power
—440 mW (commercial)
—605 mW (military)
Low standby power (7C148)
—82.5 mW (25-ns version)
—55 mW (all others)
5-volt power supply
±
10% tolerance, both commercial
and military
TTL-compatible inputs and outputs
Functional Description
The CY7C148 and CY7C149 are high-performance CMOS
static RAMs organized as 1024 by 4 bits. Easy memory expan-
sion is provided by an active LOW chip select (CS) input and
three-state outputs. The CY7C148 remains in a low-power
mode as long as the device remains unselected; i.e., (CS) is
HIGH, thus reducing the average power requirements of the
device. The chip select (CS) of the CY7C149 does not affect
the power dissipation of the device.
Writing to the device is accomplished when the chip select
(CS) and write enable (WE) inputs are both LOW. Data on the
I/O pins (I/O
0
through I/O
3
) is written into the memory loca-
tions specified on the address pins (A
0
through A
9
).
Reading the device is accomplished by taking chip select (CS)
LOW while write enable (WE) remains HIGH. Under these
conditions, the contents of the location specified on the
address pins will appear on the four data I/O pins.
The I/O pins remain in a high-impedance state when chip se-
lect (CS) is HIGH or write enable (WE) is LOW.
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Logic Block Diagram
PinConfigurations
64x64
ARRAY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
18
17
16
15
Top View
DIP
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
9
COLUMN
DECODER
R
S
INPUTBUFFER
POWER
DOWN
(7C148)
WE
CS
I/O
0
A5
A4
A3
A0
A1
A2
CS
WE
GND
VCC
A7
A8
A9
I/O0
I/O1
I/O2
I/O3
I/O
1
A
1
A
0
A6
I/O
2
I/O
3
6
7
3
4
5
8 9
G
2 1
1011
W
1817
16
15
12
A4
A13
A10
A11
A8
A9
I/O0
I/O1
I/O2
A
A
V
A
I
Top View
LCC
C
C148–1
C148–2
C148–3
Selection Guide
7C148
25
25
90
7C148
35
35
80
110
10
10
7C148
45
45
80
110
10
10
7C149
25
25
90
7C149
35
35
80
110
7C149
45
45
80
110
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Commercial
Military
Commercial
Military
Maximum Standby
Current (mA)
15
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C149 WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY7C149-45PC | 功能描述:1KX4 18-PIN SRAM RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR) |
| CY7C150-10DC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C150-15PC | 制造商:Rochester Electronics LLC 功能描述:4K (1K X 4)- 24 PIN 300 MIL SEPARATE I/O & RESET SRAM - Bulk |
| CY7C15025PC | 制造商:CYPRESS 功能描述:* |
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