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參數(shù)資料
| 型號： | CY7C1362B-166BZC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM |
| 中文描述： | 512K X 18 CACHE SRAM, 3.5 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1.20 MM HEIGHT, FBGA-165 |
| 文件頁數(shù)： | 11/34頁 |
| 文件大?。?/td> | 895K |
| 代理商： | CY7C1362B-166BZC |
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CY7C1360B
CY7C1362B
Document #: 38-05291 Rev. *C
Page 11 of 34
V
DDQ
4,11,20,27,
54,61,70,
77
4,11,20,27,
54,61,70,
77
A1,A7,F1,
F7,J1,J7,
M1,M7,
U1,U7
C3,C9,D3,
D9,E3,E9,
F3,F9,G3,
G9,J3,J9,
K3,K9,L3,
L9,M3,M9,
N3,N9
I/O Power
Supply
Power supply for the I/O circuitry
.
MODE
31
31
R3
R1
Input-
Static
Selects Burst Order
. When tied to GND selects
linear burst sequence. When tied to V
DD
or left
floating selects interleaved burst sequence. This is
a strap pin and should remain static during device
operation. Mode pin has an internal pull-up.
TDO
-
-
U5
P7
JTAG serial
output
Synchronous
Serial data-out to the JTAG circuit
. Delivers data
on the negative edge of TCK. If the JTAG feature
is not being utilized, this pin should be left uncon-
nected. This pin is not available on TQFP
packages.
TDI
-
-
U3
P5
JTAG serial
input
Synchronous
Serial data-In to the JTAG circuit
. Sampled on
the rising edge of TCK. If the JTAG feature is not
being utilized, this pin can be left floating or con-
nected to V
DD
through a pull-up resistor. This pin
is not available on TQFP packages.
TMS
-
-
U2
R5
JTAG serial
input
Synchronous
Serial data-In to the JTAG circuit
. Sampled on
the rising edge of TCK. If the JTAG feature is not
being utilized, this pin can be disconnected or con-
nected to V
DD
. This pin is not available on TQFP
packages.
TCK
-
-
U4
R7
JTAG-Clock
Clock input to the JTAG circuitry
. If the JTAG
feature is not being utilized, this pin must be
connected to V
SS
. This pin is not available on
TQFP packages.
NC
1,2,3,6,7,
14,16,25,
28,29,30,
38,39,42,
51,52,53,
56,57,66,
75,78,79,
95,96
1,2,3,6,7,
14,16,25,
28,29,30,
38,39,42,
43,51,52,
53,56,57,
66,75,78,
79,95,96
B1,B7,
C1,C7,
D2,D4,
D7,E1,
E6,H2,
F2,G1,
G6,H7,
J3,J5,K1,
K6,L4,L2,
L7,M6,
N2,L7,P1,
P6,R1,
R5,R7,
T1,T4,U6
A5,B1,B4,
C1,C2,C10,
D1,D10,
E1,E10,F1,
F10,G1,
G10,H1,H3,
H9,H10,J2,
J11,K2,
K11,L2,L1,
M2,M11,
N2,N7,N10,
N5,N11,P1,
A1,B11,P2,
R2,N6
-
No Connects
. Not internally connected to the die.
CY7C1362B–Pin Definitions
(continued)
Name
TQFP
3-Chip
Enable
TQFP
2-Chip
Enable
BGA
fBGA
I/O
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1362B-225BZC | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1362B-200AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 9M-Bit 512K x 18 3ns 100-Pin TQFP |
| CY7C1362C-166AJXC | 功能描述:靜態(tài)隨機存取存儲器 512Kx18 3.3V COM Sync PL 1CD 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1362C-166AJXCT | 功能描述:IC SRAM 9MBIT 166MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C1362C-166AXC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 9M-Bit 512K x 18 3.5ns 100-Pin TQFP |
| CY7C1362C-166BZC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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