- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄378498 > CY7C1327G (Cypress Semiconductor Corp.) 4-Mbit (256K x 18) Pipelined Sync SRAM(4-Mb (256K x 18)管道式同步SRAM) PDF資料下載
參數(shù)資料
| 型號(hào)： | CY7C1327G |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4-Mbit (256K x 18) Pipelined Sync SRAM(4-Mb (256K x 18)管道式同步SRAM) |
| 中文描述： | 4兆位（256 × 18）流水線同步靜態(tài)存儲(chǔ)器（4字節(jié)（256 × 18）管道式同步靜態(tài)存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 1/18頁(yè) |
| 文件大?。?/td> | 372K |
| 代理商： | CY7C1327G |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
4-Mbit (256K x 18) Pipelined Sync SRAM
CY7C1327G
Cypress Semiconductor Corporation
Document #: 38-05519 Rev. *F
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised July 5, 2006
Features
Registered inputs and outputs for pipelined operation
256K ×18 common I/O architecture
3.3V core power supply (V
DD
)
2.5V I/O power supply (V
DDQ
)
Fast clock-to-output times
— 2.6 ns (for 250-MHz device)
Provide high-performance 3-1-1-1 access rate
User-selectable burst counter supporting Intel
Pentium
interleaved or linear burst sequences
Separate processor and controller address strobes
Synchronous self-timed writes
Asynchronous output enable
Offered in lead-free 100-pin TQFP package, lead-free
and non-lead-free 119-ball BGA package
“ZZ” Sleep Mode Option
Functional Description
[1]
The CY7C1327G SRAM integrates 256K x 18 SRAM cells with
advanced synchronous peripheral circuitry and a two-bit
counter for internal burst operation. All synchronous inputs are
gated by registers controlled by a positive-edge-triggered
Clock Input (CLK). The synchronous inputs include all
addresses, all data inputs, address-pipelining Chip Enable
(CE
1
), depth-expansion Chip Enables (CE
2
and CE
3
), Burst
Control inputs (ADSC, ADSP, and ADV), Write Enables
(BW
[A:B]
, and BWE), and Global Write (GW). Asynchronous
inputs include the Output Enable (OE) and the ZZ pin.
Addresses and chip enables are registered at rising edge of
clock when either Address Strobe Processor (ADSP) or
Address Strobe Controller (ADSC) are active. Subsequent
burst addresses can be internally generated as controlled by
the Advance pin (ADV).
Address, data inputs, and write controls are registered on-chip
to initiate a self-timed Write cycle.This part supports Byte Write
operations (see Pin Descriptions and Truth Table for further
details). Write cycles can be one to two bytes wide as
controlled by the byte write control inputs. GW when active
LOW causes all bytes to be written.
The CY7C1327G operates from a +3.3V core power supply
while all outputs also operate with a +3.3V or a +2.5V supply.
All inputs and outputs are JEDEC-standard JESD8-5-
compatible.
Note:
1. For best-practices recommendations, please refer to the Cypress application note
System Design Guidelines
on www.cypress.com.
Logic Block Diagram
A0, A1, A
ADDRESS
REGISTER
ADV
CLK
BURST
COUNTER AND
LOGIC
CLR
Q1
Q0
ADSC
BW
B
BW
A
BWE
CE
1
CE2
CE3
DQ
B,
DQP
B
WRITE REGISTER
DQ
A,
DQP
A
WRITE REGISTER
ENABLE
REGISTER
OE
SENSE
AMPS
MEMORY
ARRAY
ADSP
2
MODE
GW
PIPELINED
ENABLE
DQs
DQP
A
DQP
B
OUTPUT
REGISTERS
INPUT
REGISTERS
E
DQ
A,
DQP
A
WRITE DRIVER
OUTPUT
BUFFERS
DQ
B,
DQP
B
WRITE DRIVER
A[1:0]
ZZ
SLEEP
CONTROL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1327 | 256K x 18 Synchronous-Pipelined Cache RAM( 256K x 18 同步流水線式高速緩沖存儲(chǔ)器 RAM) |
| CY7C132 | 2Kx8 Dual-Port Static RAM(2K x 8 雙端口靜態(tài) RAM) |
| CY7C142 | 2Kx8 Dual-Port Static RAM(2K x 8 雙端口靜態(tài) RAM) |
| CY7C136 | 2Kx8 Dual-Port Static RAM(2K x 8 雙端口靜態(tài) RAM) |
| CY7C146 | 2Kx8 Dual-Port Static RAM(2K x 8 雙端口靜態(tài) RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1327G-100AXI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx18 3.3V IND Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1327G-100AXIT | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx18 3.3V IND Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1327G-100BGXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx18 3.3V COM Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1327G-100BGXCT | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx18 3.3V COM Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1327G-133AXI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx18 3.3V IND Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。