參數(shù)資料
型號： CY7C107BN-15VI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 1M x 1 Static RAM
中文描述： 1M X 1 STANDARD SRAM, 15 ns, PDSO28
封裝： 0.400 INCH, SOJ-28
文件頁數(shù)： 1/7頁
文件大小： 308K
代理商： CY7C107BN-15VI
1M x 1 Static RAM
CY7C107BN
CY7C1007BN
Cypress Semiconductor Corporation
Document #: 001-06426 Rev. **
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised February 1, 2006
Features
High speed
— t
AA
= 15 ns
CMOS for optimum speed/power
Automatic power-down when deselected
TTL-compatible inputs and outputs
Functional Description
The CY7C107BN and CY7C1007BN are high-performance
CMOS static RAMs organized as 1,048,576 words by 1 bit.
Easy memory expansion is provided by an active LOW Chip
Enable (CE) and three-state drivers. These devices have an
automatic
power-down
feature
consumption by more than 65% when deselected.
Writing to the devices is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the input pin
(D
IN
) is written into the memory location specified on the
address pins (A
0
through A
19
).
Reading from the devices is accomplished by taking Chip
Enable (CE) LOW while Write Enable (WE) remains HIGH.
Under these conditions, the contents of the memory location
specified by the address pins will appear on the data output
(D
OUT
) pin.
The output pin (D
OUT
) is placed in a high-impedance state
when the device is deselected (CE HIGH) or during a write
operation (CE and WE LOW).
The CY7C107BN is available in a standard 400-mil-wide SOJ;
the CY7C1007BN is available in a standard 300-mil-wide SOJ
that
reduces
power
LogicBlock Diagram
Pin Configuration
SOJ
Top View
512 x 2048
ARRAY
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
POWER
DOWN
WE
CE
INPUT BUFFER
D
OUT
D
IN
A
4
A
3
A
2
A
1
A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
19
18
17
21
24
23
22
25
28
27
26
GND
A
11
A
12
A
13
A
14
A
WE
V
CC
A
9
A
8
A
7
A
6
A
5
A
10
CE
A
0
D
IN
D
OUT
A
2
A
1
A
4
NC
A
3
NC
A
16
A
17
A
18
A
19
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
9
Selection Guide
7C107BN-15
7C1007BN-15
15
80
2
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current I
SB2
(mA)
[+] Feedback
相關PDF資料
PDF描述
CY7C107D 1-Mbit (1M x 1) Static RAM
CY7C107 1M x 1 Static RAM
CY7C107-12VC 1M x 1 Static RAM
CY7C107-15VI 1M x 1 Static RAM
CY7C107-20VC 1M x 1 Static RAM
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