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參數(shù)資料
| 型號(hào)： | CY7C038 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 32K/64K x 16/18 Dual-Port Static RAM |
| 中文描述： | 32K/64K x 16/18雙端口靜態(tài)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 1/19頁(yè) |
| 文件大小： | 256K |
| 代理商： | CY7C038 |
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32K/64K x 16/18
Dual-Port Static RAM
CY7C027/028
CY7C037/038
Cypress Semiconductor Corporation
Document #: 38-06042 Rev. *A
3901 North First Street
San Jose
CA 95134
Revised December 27, 2002
408-943-2600
25/0251
Features
True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
32K x 16 organization (CY7C027)
64K x 16 organization (CY7C028)
32K x 18 organization (CY7C037)
64K x 18 organization (CY7C038)
0.35-micron CMOS for optimum speed/power
High-speed access: 12
[1]
/15/20 ns
Low operating power
—
Active: I
CC
= 180 mA (typical)
—
Standby: I
SB3
= 0.05 mA (typical)
Fully asynchronous operation
Automatic power-down
Expandable data bus to 32/36 bits or more using Mas-
ter/Slave chip select when using more than one device
On-chip arbitration logic
Semaphores included to permit software handshaking
between ports
INT flags for port-to-port communication
Separate upper-byte and lower-byte control
Dual Chip Enables
Pin select for Master or Slave
Commercial and industrial temperature ranges
Available in 100-pin TQFP
Pin-compatible and functionally equivalent to IDT7027
Notes:
1.
2.
3.
See page 6 for Load Conditions.
I/O
8
–
I/O
15
for x16 devices; I/O
9
–
I/O
for x18 devices.
I/O
0
–
I/O
7
for x16 devices; I/O
0
–
I/O
8
for x18 devices.
For the most recent information, visit the Cypress web site at www.cypress.com
4.
5.
A
–
A
for 32K; A
–
A
for 64K devices.
BUSY is an output in master mode and an input in slave mode.
R/W
L
UB
L
CE
0L
CE
1L
OE
L
I/O
8/9L
–
I/O
15/17L
I/O
Control
Address
Decode
A
0L
–
A
14/15L
CE
L
OE
L
R/W
L
SEM
L
BUSY
L
INT
L
UB
L
LB
L
I/O
Control
CE
L
Interrupt
Semaphore
Arbitration
M/S
LB
L
I/O
0L
–
I/O
7/8L
R/W
R
UB
R
CE
0R
CE
1R
OE
R
I/O
8/9L
–
I/O
15/17R
CE
R
LB
R
I/O
0L
–
I/O
7/8R
Logic Block Diagram
A
0L
–
A
14/15L
True Dual-Ported
RAM Array
A
0R
–
A
14/15R
CE
R
OE
R
R/W
R
SEM
R
BUSY
R
INT
R
UB
R
LB
R
Address
Decode
A
0R
–
A
14/15R
[2]
[2]
[3]
[3]
[4]
[4]
[5]
[5]
[4]
[4]
15/16
8/9
8/9
15/16
8/9
8/9
15/16
15/16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C038-12AC | 32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038-15AC | 32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038-20AC | 32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038-20AI | 32K/64K x 16/18 Dual-Port Static RAM |
| CY7C027-15AC | 32K/64K x 16/18 Dual-Port Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C038-12AC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038-15AC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038-20AC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038-20AI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:32K/64K x 16/18 Dual-Port Static RAM |
| CY7C038V | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 32K/64K x 16/18 Dual-Port Static RAM |
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