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參數(shù)資料
| 型號(hào)： | CY7C009V-15AC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | RF/Coaxial Connector; RF Coax Type:7/16; Contact Termination:Solder; Body Style:Panel Flanged Receptacle RoHS Compliant: Yes |
| 中文描述： | 128K X 8 DUAL-PORT SRAM, 15 ns, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 222K |
| 代理商： | CY7C009V-15AC |
3.3V 64K/128K x 8/9
Dual-Port Static RAM
CY7C008V/009V
CY7C018V/019V
Cypress Semiconductor Corporation
Document #: 38-06044 Rev. *B
3901 North First Street
San Jose
CA 95134
Revised December 27, 2002
408-943-2600
25/0251
Features
True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
64K x 8 organization (CY7C008)
128K x 8 organization (CY7C009)
64K x 9 organization (CY7C018)
128K x 9 organization (CY7C019)
0.35-micron CMOS for optimum speed/power
High-speed access: 15/20/25 ns
Low operating power
—
Active: I
CC
= 115 mA (typical)
—
Standby: I
SB3
= 10
μ
A (typical)
Fully asynchronous operation
Automatic power-down
Expandable data bus to 16/18 bits or more using Mas-
ter/Slave chip select when using more than one device
On-chip arbitration logic
Semaphores included to permit software handshaking
between ports
INT flag for port-to-port communication
Dual Chip Enables
Pin select for Master or Slave
Commercial and Industrial Temperature Ranges
Available in 100-pin TQFP
Notes:
1.
2.
3.
I/O
0
–
I/O
for x8 devices; I/O
0
–
I/O
for x9 devices.
A
–
A
for 64K devices; A
–
A
for 128K.
BUSY is an output in master mode and an input in slave mode.
I/O
Control
Address
Decode
A
0L
–
A
15/16L
CE
L
OE
L
R/W
L
SEM
L
BUSY
L
INT
L
I/O
Control
Interrupt
Semaphore
Arbitration
M/S
Logic Block Diagram
A
0L
–
A
15/16L
True Dual-Ported
RAM Array
A
0R
–
A
15/16R
CE
R
OE
R
R/W
R
SEM
R
BUSY
R
INT
R
Address
Decode
A
0R
–
A
15/16R
[1]
[1]
[2]
[2]
[3]
[3]
[2]
[2]
R/W
L
CE
0L
CE
1L
OE
L
I/O
0L
–
I/O
7/8L
CE
L
R/W
R
CE
0R
CE
1R
OE
R
I/O
0R
–
I/O
7/8R
CE
R
16/17
8/9
16/17
8/9
16/17
16/17
For the most recent information, visit the Cypress web site at www.cypress.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C009V-20AC | RF/Coaxial Connector; RF Coax Type:7/16; Contact Termination:Blunt Post; Body Style:Panel Flanged Receptacle RoHS Compliant: Yes |
| CY7C009V-20AI | TNC Coaxial Connector; Body Style:Straight Terminator RoHS Compliant: Yes |
| CY7C009V-25AC | TNC CAP AND CHAIN |
| CY7C019V-20AC | 3.3V 64K/128K x 8/9 Dual-Port Static RAM |
| CY7C019V-20AI | 3.3V 64K/128K x 8/9 Dual-Port Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C009V-15AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3V 128Kx8 COM Async Dual Port 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C009V-20AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 3.3V 1M-Bit 128K x 8 20ns 100-Pin TQFP |
| CY7C009V-20AI | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC DUAL 3.3V 1MBIT 128KX8 20NS 100TQFP - Trays |
| CY7C009V-20AXI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3V 128Kx8 IND Async Dual Port 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C009V-25AC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 64K/128K x 8/9 Dual-Port Static RAM |
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