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參數(shù)資料
| 型號： | CY74FCT841T |
| 英文描述： | 10-Bit Bus-Interface D-Type Latches with 3-State Outputs |
| 中文描述： | 10 - 3位總線接口D類鎖存態(tài)輸出 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 102K |
| 代理商： | CY74FCT841T |
CY74FCT823T
9-BIT BUS-INTERFACE REGISTER
SCCS069
–
OCTOBER 2001
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ORDERING INFORMATION
TA
PACKAGE
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP
–
Q
Tape and reel
6
CY74FCT823CTQCT
FCT823C
SOIC
–
SO
Tube
6
CY74FCT823CTSOC
FCT823C
Tape and reel
6
CY74FCT823CTSOCT
–
40
°
C to 85
°
C
DIP
–
P
Tube
7.5
CY74FCT823BTPC
CY74FCT823BTPC
DIP
–
P
Tube
10
CY74FCT823ATPC
CY74FCT823ATPC
QSOP
–
Q
Tape and reel
10
CY74FCT823ATQCT
FCT823A
SOIC
–
SO
Tube
Tape and reel
10
10
CY74FCT823ATSOC
CY74FCT823ATSOCT
FCT823A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
INTERNAL
OUTPUTS
FUNCTION
OE
H
CLR
H
EN
L
D
L
CP
↑
↑
X
Q
L
Y
Z
Z
H
H
L
H
H
Z
H
L
X
X
L
Z
Clear
L
L
X
X
X
L
L
H
H
H
X
X
NC
Z
Hold
L
H
H
X
X
↑
↑
↑
↑
NC
NC
H
H
L
L
L
Z
H
H
L
H
H
Z
Load
L
L
H
H
L
L
L
H
L
H
L
H
H = High logic level, L = Low logic level, X = Don
’
t care, NC = No change,
↑
= Low-to-high transition, Z = High-impedance state
logic diagram (positive logic)
To Eight Other Channels
D0
Y0
EN
CP
OE
CLR
1
11
14
13
2
CL
CP
23
Q
D0
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