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參數(shù)資料
| 型號： | CY62256NLL-70PC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 256K (32K x 8) Static RAM |
| 中文描述： | 32K X 8 STANDARD SRAM, 70 ns, PDIP28 |
| 封裝： | 0.600 INCH, MS-011, DIP-28 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 704K |
| 代理商： | CY62256NLL-70PC |
256K (32K x 8) Static RAM
CY62256N
Cypress Semiconductor Corporation
Document #: 001-06511 Rev. *A
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised August 3, 2006
Features
Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
High speed: 55 ns
Voltage range: 4.5V–5.5V operation
Low active power
— 275 mW (max.)
Low standby power (LL version)
—
82.5
μ
W (max.)
Easy memory expansion with CE and OE features
TTL-compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed/power
Available in pb-free and non Pb-free 28-lead (600-mil)
PDIP, 28-lead (300-mil) narrow SOIC, 28-lead TSOP-I
and 28-lead Reverse TSOP-I packages
Functional Description
[1]
The CY62256N is a high-performance CMOS static RAM
organized as 32K words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE) and active LOW
output enable (OE) and tri-state drivers. This device has an
automatic
power-down
feature,
consumption by 99.9% when deselected.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O
0
through I/O
7
) is written into the memory location
addressed by the address present on the address pins (A
0
through A
14
). Reading the device is accomplished by selecting
the device and enabling the outputs, CE and OE active LOW,
while WE remains inactive or HIGH. Under these conditions,
the contents of the location addressed by the information on
address pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
reducing
the
power
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
COLUMN
DECODER
R
S
INPUTBUFFER
POWER
DOWN
WE
OE
I/O
0
CE
I/O
1
I/O
2
I/O
3
32K x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
10
A
1
A
1
A
1
A
0
A
1
A
1
Logic Block Diagram
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY62256NLL-70PXC | 256K (32K x 8) Static RAM |
| CY62256NLL-70SNC | 256K (32K x 8) Static RAM |
| CY62256NLL-70SNI | 256K (32K x 8) Static RAM |
| CY62256NLL-70SNXA | 256K (32K x 8) Static RAM |
| CY62256NLL-70SNXC | 256K (32K x 8) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62256NLL-70PXC | 功能描述:靜態(tài)隨機存取存儲器 256K (32K x 8) Static RAM RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62256NLL-70PXC | 制造商:Cypress Semiconductor 功能描述:IC SRAM 256KBIT PARALLEL 70NS 8-DIP |
| CY62256NLL-70SNC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY62256NLL-70SNCT | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY62256NLL-70SNI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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