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參數(shù)資料
| 型號(hào)： | CY62147V18LL-70BAI |
| 英文描述： | x16 SRAM |
| 中文描述： | x16的SRAM |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 153K |
| 代理商： | CY62147V18LL-70BAI |
CY62147V18 MoBL2
4
.
AC Test Loads and Waveforms
V
CC
Typ
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
OUTPUT
V
TH
Equivalent to:
TH
é
VENIN EQUIVALENT
R
TH
ALL INPUT PULSES
R1
V
CC
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
(b)
R1
R2
(a)
Rise TIme: 1 V/ns
Fall Time: 1 V/ns
(C)
Parameters
R1
R2
R
TH
V
TH
1.8V
15294
11300
6500
0.85V
Unit
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics
(Over the Operating Range)
Parameter
V
DR
I
CCDR
Description
Conditions
Min.
1.0
Typ.
[2]
Max.
1.95
Unit
V
μ
A
V
CC
for Data Retention
Data Retention Current
V
CC
= 1.0V
CE > V
CC
–
0.3V,
V
IN
> V
CC
–
0.3V or
V
IN
< 0.3V
No input may exceed
V
CC
+ 0.3V
Std.
10
25
t
CDR[3]
Chip Deselect to Data
Retention Time
0
ns
t
R[4]
Note:
4.
Operation Recovery Time
85
ns
Full Device AC operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
> 10
μ
s or stable at V
CC(min.)
>10
μ
s.
Data Retention Waveform
V
CC(min)
V
CC(min)
t
CDR
V
DR
> 1.0 V
DATA RETENTION MODE
t
R
CE
V
CC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY62147VLL-70BAI | SRAM|256KX16|CMOS|BGA|48PIN|PLASTIC |
| CY62148-100SC | x8 SRAM |
| CY62148-100SI | x8 SRAM |
| CY62148-100ZSC | x8 SRAM |
| CY62148-100ZSI | x8 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62147VLL-70BAI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 4M-Bit 256K x 16 70ns 48-Pin FBGA |
| CY62147VLL-70BAIT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 4M-Bit 256K x 16 70ns 48-Pin FBGA T/R |
| CY62147VLL-70ZI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4M (256K x 16) Static RAM |
| CY62147VLL-70ZIT | 制造商:Rochester Electronics LLC 功能描述:4MB (256K X 16)- SLOW ASYNCH SRAM - Tape and Reel |
| CY62148 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:512K x 8 Static RAM |
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