參數(shù)資料
型號: CY3950Z388-181MGC
廠商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件頁數(shù): 25/86頁
文件大?。?/td> 1212K
代理商: CY3950Z388-181MGC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 25 of 86
Switching Waveforms
(continued)
Registered Output with Synchronous Clocking (Macrocell)
t
MCS
INPUT
SYNCHRONOUS
t
MCCO
REGISTERED
OUTPUT
t
MCH
CLOCK
Registered Input in I/O Cell
t
IOS
DATA
INPUT
INPUT REGISTER
CLOCK
t
IOCO
REGISTERED
OUTPUT
t
IOH
Clock to Clock
INPUT REGISTER
CLOCK
MACROCELL
REGISTER CLOCK
t
SCS
t
ICS
PT Clock to PT Clock
DATA
INPUT
PT CLOCK
t
SCS2PT
t
MCSPT
相關(guān)PDF資料
PDF描述
CY39100V208-125BBI CUTTER & PLIER SET, SENSO PLUS 6 PIECE;
CY39100V208-125BGC CPLDs at FPGA Densities
CY39100V208-125BGI HAND TOOL KIT, 14 PC;
CY39100V208-125MBC PLIERS, CIRCLIP ADJUSTABLEPLIERS, CIRCLIP ADJUSTABLE; Handle type:Soft grip
CY39100V208-125MBI PLIERS, ULTRA FLAT FINE SMOOTH JAW 135MMPLIERS, ULTRA FLAT FINE SMOOTH JAW 135MM; Jaw type:Flat nose; Length:135mm; Handle type:ESD; Finish:Smooth; Length, jaw:22mm
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY3950Z388-181NC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY3950Z388-233MGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY3950Z388-233MGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY3950Z388-233NTC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY3950Z484-125BBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities