參數(shù)資料
型號: CY39200Z208-181NC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: PLD
英文描述: CPLDs at FPGA Densities
中文描述: LOADABLE PLD, 8.5 ns, PQFP208
封裝: PLASTIC, QFP-208
文件頁數(shù): 2/86頁
文件大小: 1212K
代理商: CY39200Z208-181NC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 2 of 86
Notes:
3.
4.
Speed bins shown here are for commercial operating range. Please refer to Delta39K ordering information on industrial-range speed bins on page 38.
Self-boot solution integrates the boot PROM (flash memory) with Delta39K die inside the same package. This flash memory can endure at least 10,000
programming/erase cycles and can retain data for at least 100 years.
Delta39K Speed Bins
[3]
Device
39K30
39K50
39K100
39K165
39K200
V
CC
233
X
X
200
181
125
X
X
X
X
X
83
X
X
X
X
X
3.3/2.5V
3.3/2.5V
3.3/2.5V
3.3/2.5V
3.3/2.5V
X
X
X
Device Package Offering and I/O Count Including Dedicated Clock and Control Inputs
Device
39K30
39K50
39K100
39K165
39K200
208 EQFP
28 × 28 mm
0.5-mm pitch
136
136
136
136
136
256 FBGA
17 × 17 mm
1.0-mm pitch
174
180
180
484-FBGA
23 × 23 mm
1.0-mm pitch
Self-Boot
Solution
[4]
388-BGA
35 × 35 mm
1.27-mm pitch
256-FBGA
17 × 17 mm
1.0-mm pitch
174
484-FBGA
23 × 23 mm
1.0-mm pitch
676-FBGA
27 × 27 mm
1.0-mm pitch
218
294
294
294
218
302
356
368
302
386
428
相關PDF資料
PDF描述
CY3930V256-181NC PCB COPPER CLAD 4 X 6 2 SIDE
CY3950V256-181NC PCB COPPER CLAD POS 4 X 62 SIDE
CY39100V256-181NC PCB COPPER CLAD POS 4.5X72 SIDE
CY39165V256-181NC CPLDs at FPGA Densities
CY39200V256-181NC PCB COPPER CLAD 6 X 62 SIDE
相關代理商/技術參數(shù)
參數(shù)描述
CY39200Z208-181NI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-181NTC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-181NTI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-200BBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200Z208-200BBI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities