參數(shù)資料
型號: CY39165V256-181MGC
廠商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件頁數(shù): 33/86頁
文件大小: 1212K
代理商: CY39165V256-181MGC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 33 of 86
Switching Waveforms
(continued)
CLOCK
A
n
A
n
B
n–1
B
n+1
t
CHMBDV
A
n–1
t
CHMBDV
t
CHMS
t
CHMS
ADDRESS B
ADDRESS
MATCH
Dual-Port Synchronous Address Match Busy Signal
ADDRESS A
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相關代理商/技術參數(shù)
參數(shù)描述
CY39165V256-181NC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165V256-200MGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165V256-233MGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165V256-233MGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39165V256-233NTC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities