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參數(shù)資料
| 型號： | CY39100Z208-125BGI |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | CPLDs at FPGA Densities |
| 中文描述： | CPLD器件在FPGA的密度 |
| 文件頁數(shù)： | 21/86頁 |
| 文件大?。?/td> | 1212K |
| 代理商： | CY39100Z208-125BGI |
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Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 21 of 86
Switching Characteristics — Parameter Values
Over the Operating Range
Internal Parameters
t
CHMCHAA
Asynchronous channel memory access time from input of channel memory to output of channel memory
Channel Memory Timing Parameter Descriptions
Over the Operating Range (continued)
Parameter
Description
Parameter
Combinatorial Mode Parameters
t
PD
t
EA
t
ER
t
PRR
t
PRO
t
PRW
Synchronous Clocking Parameters
t
MCS
t
MCH
t
MCCO
t
IOS
t
IOH
t
IOCO
t
SCS
t
SCS2
t
ICS
t
OCS
t
CHZ
t
CLZ
f
MAX
f
MAX2
Product Term Clocking Parameters
t
MCSPT
t
MCHPT
t
MCCOPT
t
SCS2PT
Channel Interconnect Parameters
t
CHSW
t
CL2CL
Miscellaneous Parameters
t
CPLD
t
MCCD
PLL Parameters
t
MCCJ
t
DWSA
t
DWOSA
t
LOCK
233
200
181
125
83
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
7.2
4.5
4.5
7.5
5.0
5.0
8.5
5.6
5.3
10
9.0
9.0
15
10
10
ns
ns
ns
ns
ns
ns
6.0
9.5
3.3
6.0
10
3.6
6.0
10.5
4.0
8.0
13
6.0
10
15
7.0
2.7
0
3.0
0
3.5
0
5.0
0
6.7
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
5.8
6.0
7.0
10
12
1.0
0.9
1.0
1.0
1.2
1.2
2.0
2.0
2.5
2.5
3.8
4.0
4.5
7.0
8.0
3.4
4.3
4.5
4.5
3.5
4.5
5.0
5.0
3.6
5.5
5.5
5.5
6.4
8.0
8.0
8.0
9.6
12
12
12
3.5
3.5
3.8
6.0
7.0
1.5
1.5
1.5
1.5
1.5
294
233
286
222
278
181
156
125
104
83
2.7
0.9
3.0
1.0
3.3
1.4
5.0
2.0
6.0
2.5
ns
ns
ns
ns
7.5
8.0
8.8
11.0
15.0
6.0
6.5
7.2
10.0
15.0
0.9
1.8
1.0
2.0
1.2
2.3
1.7
2.8
2.0
3.0
ns
ns
2.8
0.22
3.0
0.25
3.3
0.28
4.0
0.35
5.0
0.38
ns
ns
–150
–1.35
–150
150
–0.85
150
250
–150
–1.35
–150
150
–0.85
150
250
–150
–1.35
–150
150
–0.85
150
250
–180
–2.0
–180
180
–1.5
180
250
–200
–2.9
–200
200
–2.4
200
250
ps
ns
ps
ms
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY39200Z208-125BGI | CABLE, COAX, 1505A, PER M; Impedance:75R; Conductor make-up:1/20AWG; Diameter, External:5.92mm; Material, conductor:Copper; Material, primary insulation:Polyethylene; Coaxial cable type:RG59/U; Attenuation, 1 GHz:24.92dB; RoHS Compliant: Yes |
| CY3930Z208-125MBC | Coaxial Cable; Coaxial RG/U Type:59; Impedance:75ohm; Conductor Size AWG:20; No. Strands x Strand Size:Solid; Jacket Material:Polyvinylchloride (PVC); Jacket Color:Red; Leaded Process Compatible:Yes; Voltage Nom.:30V RoHS Compliant: Yes |
| CY3950Z208-125MBC | Coaxial Cable; Coaxial RG/U Type:59; Impedance:75ohm; Conductor Size AWG:20; No. Strands x Strand Size:Solid; Jacket Material:Polyvinylchloride (PVC); Jacket Color:Blue; Leaded Process Compatible:Yes; Voltage Nom.:30V RoHS Compliant: Yes |
| CY39100Z208-125MBC | Coaxial Cable; Coaxial RG/U Type:59; Impedance:75ohm; Conductor Size AWG:20; No. Strands x Strand Size:Solid; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes RoHS Compliant: Yes |
| CY39200Z208-125MBC | Coaxial Cable; Coaxial RG/U Type:59; Impedance:75ohm; Conductor Size AWG:20; No. Strands x Strand Size:Solid; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY39100Z208-125MBC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39100Z208-125MBI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39100Z208-125MGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39100Z208-125MGI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39100Z208-125NC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
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