- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄223637 > CY2SSTV857LFXC-32T (CYPRESS SEMICONDUCTOR CORP) SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40 PDF資料下載
參數(shù)資料
| 型號(hào)： | CY2SSTV857LFXC-32T |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40 |
| 封裝： | 6 X 6 MM, LEAD FREE, QFN-40 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 179K |
| 代理商： | CY2SSTV857LFXC-32T |
CY2SSTV857-32
Document #: 38-07557 Rev. *E
Page 5 of 9
CLK
CLK#
DDR-SDRAM
PLL
FBIN
FBIN#
120 Ohm
DDR-SDRAM
Stack
DDR-SDRAM
Stack
120 Ohm
VTR
VCP
0.3"
= 2.5"
= 0.6" (Split to Terminator)
DDR-SDRAM
represents a capacitive load
FBOUT#
FBOUT
DDR-SDRAM
Output load capacitancce for 4 DDR-SDRAM Loads: 10 pF < CL < 16 pF
Figure 5. Clock Structure # 1
60 O h m
Re c e iv e r
VC P
VT R
R
T = 1 20 O h m
OU T
OU T #
VD D Q
60 O h m
14 pF
VD D Q /2
V DDQ/2
V DDQ
Figure 6. Differential Signal Using Direct Termination Resistor
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2SSTV857ZC-32 | PLL BASED CLOCK DRIVER, PDSO48 |
| CY37064VP44-YMB | EE PLD, 12 ns, CQCC44 |
| CY37128VP84-83YMB | EE PLD, 15 ns, CQCC84 |
| CY74FCT162501ATPACT | FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| CY74FCT16501ETPVC | FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2SSTV857LFXC-32T[15] | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Differential Clock Buffer/Driver DDR400/PC3200-Compliant |
| CY2SSTV857ZC-27 | 制造商:Rochester Electronics LLC 功能描述:2.5V,200MHZ,DDR ZERO DELAY BUFFER - Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY2SSTV857ZC-27T | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Cypress Semiconductor 功能描述: |
| CY2SSTV857ZC-32 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY2SSTV857ZC-32T | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Differential Clock Buffer/Driver DDR400/PC3200-Compliant |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。