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參數(shù)資料
| 型號(hào)： | CY2CC1810 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 1:10 Clock Fanout Buffer with Output Enable |
| 中文描述： | 1:10時(shí)鐘扇出緩沖器的輸出使能 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 128K |
| 代理商： | CY2CC1810 |
1:10 Clock Fanout Buffer with Output Enable
COMLINK SERIES
CY2CC1810
Cypress Semiconductor Corporation
Document #: 38-07055 Rev. *C
3901 North First Street
San Jose
CA 95134
Revised December 14, 2002
408-943-2600
Features
Low-voltage operation
V
DD
range from 2.5 to 3.3V
1:10 fanout
Drives either a 50-ohm or 75-ohm transmission line
Over voltage tolerant input hot swappable
Low input capacitance
Low output skew
Low propagation delay
Typical (tpd < 4 ns)
High-speed operation > 200 MHz
LVTTL-/LVCMOS-compatible input
—
Output disable to three-state
Industrial versions available
Packages available include: SOIC/SSOP
Block Diagram
Description
The Cypress series of network circuits is produced using
advanced 0.35-micron CMOS technology, achieving the
industries fastest logic and buffers.
The Cypress CY2CC1810 fanout buffer features one input and
ten three-state outputs.
Designed for data communications clock management appli-
cations, the large fanout from a single input reduces loading
on the input clock.
AVCMOS-type outputs dynamically adjust for variable
impedance-matching and eliminate the need for series-
damping resistors; they also reduce noise overall.
Pin Configuration
OUTPUT
(AVCMOS)
OE#
IN
Q5
Q7
Q6
Q4
Q1
Q3
Q2
Q8
Q9
Q10
GND
VDD
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
24 pin SOIC/SSOP
C
GND
Q1
VDD
Q2
GND
Q3
Q4
GND
Q5
VDD
Q6
GND
GND
Q10
VDD
Q9
OE#
IN
GND
GND
Q8
VDD
Q7
GND
Pin Description
Pin Number
1,7,8,12,13,17,20,24
3,10,15,22
5
6
2,4,9,11,14,16,18,19,21,23
Pin Name
G
ND
V
DD
OE#
IN
Q10........Q1
Pin Description
Ground
Power Supply
Output Enable
Input
Output
Power
Power
LVTTL/LVCMOS
LVTTL/LVCMOS
AVCMOS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2CC1810OC | 1:10 Clock Fanout Buffer with Output Enable |
| CY2CC1810OCT | 1:10 Clock Fanout Buffer with Output Enable |
| CY2CC1810OI | 1:10 Clock Fanout Buffer with Output Enable |
| CY2CC1810OIT | 1:10 Clock Fanout Buffer with Output Enable |
| CY2CC1810SC | 1:10 Clock Fanout Buffer with Output Enable |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2CC18100XI | 制造商:Cypress Semiconductor 功能描述: |
| CY2CC1810OC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:10 Clock Fanout Buffer with Output Enable |
| CY2CC1810OCT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| CY2CC1810OI | 功能描述:時(shí)鐘緩沖器 2.5V or 3.3V 200MHz IND RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2CC1810OIT | 制造商:Cypress Semiconductor 功能描述:Clock Fanout Buffer 10-OUT 24-Pin SSOP T/R |
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