參數(shù)資料
型號(hào)： CY29976
英文描述： Clocks and Buffers
中文描述： 時(shí)鐘和緩沖器
文件頁數(shù)： 3/7頁
文件大?。?/td> 193K
代理商： CY29976
CY29940-1
Document #: 38-07487 Rev. **
Page 3 of 7
Absolute Maximum Conditions
Maximum Input Voltage Relative to V
SS
:............ V
SS
–
0.3V
Maximum Input Voltage Relative to V
DD
:.............V
DD
+ 0.3V
Storage Temperature: ................................
–
65
°
C to + 150
°
C
Operating Temperature:................................
–
40
°
C to +85
°
C
Maximum ESD Protection...............................................2 kV
Maximum Power Supply: ................................................5.5V
Maximum Input Current: ............................................±20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any
voltage higher than the maximum rated voltages to this circuit.
For proper operation, V
in
and V
out
should be constrained to the
range:
V
SS
< (V
in
or V
out
) < V
DD
Unused inputs must always be tied to an appropriate logic
voltage level (either V
SS
or V
DD
).
Notes:
2.
3.
Inputs have pull-up/pull-down resistors that effect input current.
The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the
“
High
”
input is within the VCMR
range and the input lies within the VPP specification. Driving series or parallel terminated 50
(or 50
to VDD/2) transmission lines.
Outputs driving 50
transmission lines.
See
Figure 1
and
Figure 2
.
50% input duty cycle.
4.
5.
6.
DC Electrical Specifications:
V
DD
= 3.3V ±5% or 2.5V ±5%, V
DDC
= 3.3V ±5% or 2.5V ±5%
Parameter
V
IL
V
IH
I
IL
I
IH
V
PP
Description
Conditions
Min.
V
SS
2.0
Typ.
Max.
0.8
V
DD
–
200
200
1000
Unit
V
V
μA
μA
mV
Input Low Voltage
Input High Voltage
Input Low Current
[2]
Input High Current
[2]
Peak-to-Peak Input Voltage
PECL_CLK
Common Mode Range
[3]
PECL_CLK
500
V
CMR
V
DD
= 3.3V
V
DD
= 2.5V
I
OL
= 20 mA, V
DDC
= 3.3V
I
OL
= 16 mA, V
DDC
= 2.5V
I
OH
=
–
20 mA, V
DDC
= 3.3V
I
OH
=
–
16 mA, V
DDC
= 2.5V
V
DD
= 3.3V, Outputs @
150 MHz, CL=10 pF
V
DD
= 3.3V, Outputs @
200 MHz, CL=10 pF
V
DD
= 2.5V, Outputs @
150 MHz, CL=10 pF
V
DD
= 2.5V, Outputs @
200 MHz, CL=10 pF
V
DD
–
1.4
V
DD
–
1.0
V
DD
–
0.6
V
DD
–
0.6
0.5
V
V
OL
Output Low Voltage
[4,5,6]
V
V
OH
Output High Voltage
[4,5,6]
2.4
1.8
V
I
DDQ
I
DD
Quiescent Supply Current
Dynamic Supply Current
5
7
mA
mA
285
335
200
240
Z
out
C
in
Output Impedance
Input Capacitance
18
23
4
28
pF
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY29976_08 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 125-MHz, Multi-Output Zero Delay Buffer
CY29976AI 功能描述:鎖相環(huán) - PLL 3.3V,125MHz,LVPECL/ LVCMOS In,12 Out RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
CY29976AIT 功能描述:鎖相環(huán) - PLL 3.3V,125MHz,LVPECL/ LVCMOS In,12 Out RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
CY29976AXI 功能描述:鎖相環(huán) - PLL 3.3V125MHz ZD Bffr Multi-Output RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
CY29976AXIT 功能描述:鎖相環(huán) - PLL 3.3V125MHz ZD Bffr Multi-Output RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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